5秒后页面跳转
AD9219ABCPZ-65 PDF预览

AD9219ABCPZ-65

更新时间: 2024-10-28 12:54:39
品牌 Logo 应用领域
亚德诺 - ADI 转换器模数转换器PC
页数 文件大小 规格书
56页 2673K
描述
Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V ADC

AD9219ABCPZ-65 数据手册

 浏览型号AD9219ABCPZ-65的Datasheet PDF文件第2页浏览型号AD9219ABCPZ-65的Datasheet PDF文件第3页浏览型号AD9219ABCPZ-65的Datasheet PDF文件第4页浏览型号AD9219ABCPZ-65的Datasheet PDF文件第5页浏览型号AD9219ABCPZ-65的Datasheet PDF文件第6页浏览型号AD9219ABCPZ-65的Datasheet PDF文件第7页 
Quad, 10-Bit, 40/65 MSPS  
Serial LVDS 1.8 V ADC  
Data Sheet  
AD9219  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
AVDD  
PDWN  
DRVDD  
DRGND  
4 ADCs integrated into 1 package  
94 mW ADC power per channel at 65 MSPS  
SNR = 60 dB (to Nyquist)  
AD9219  
10  
VIN + A  
VIN – A  
SERIAL  
LVDS  
D + A  
D – A  
PIPELINE  
ADC  
ENOB = 9.7 bits  
SFDR = 78 dBc (to Nyquist)  
Excellent linearity  
DNL = 0.2 LSB (typical)  
10  
10  
VIN + B  
VIN – B  
PIPELINE  
ADC  
SERIAL  
LVDS  
D + B  
D – B  
VIN + C  
VIN – C  
SERIAL  
LVDS  
INL = 0.3 LSB (typical)  
PIPELINE  
ADC  
D + C  
D – C  
Serial LVDS (ANSI-644, default)  
Low power, reduced signal option (similar to IEEE 1596.3)  
Data and frame clock outputs  
315 MHz full-power analog bandwidth  
2 V p-p input voltage range  
10  
VIN + D  
VIN – D  
SERIAL  
LVDS  
D + D  
D – D  
PIPELINE  
ADC  
VREF  
FCO+  
FCO–  
SENSE  
+
0.5V  
DATA RATE  
MULTIPLIER  
1.8 V supply operation  
Serial port control  
REFT  
REFB  
REF  
SELECT  
SERIAL PORT  
INTERFACE  
DCO+  
DCO–  
Full-chip and individual-channel power-down modes  
Flexible bit orientation  
SCLK/DTP  
RBIASAGND CSB SDIO/ODM  
CLK+ CLK–  
Built-in and custom digital test pattern generation  
Programmable clock and data alignment  
Programmable output resolution  
Standby mode  
Figure 1.  
The ADC automatically multiplies the sample rate clock for the  
appropriate LVDS serial data rate. A data clock output (DCO) for  
capturing data on the output and a frame clock output (FCO)  
for signaling a new output byte are provided. Individual-channel  
power-down is supported and typically consumes less than  
2 mW when all channels are disabled.  
APPLICATIONS  
Medical imaging and nondestructive ultrasound  
Portable ultrasound and digital beam-forming systems  
Quadrature radio receivers  
Diversity radio receivers  
Tape drives  
Optical networking  
The ADC contains several features designed to maximize  
flexibility and minimize system cost, such as programmable  
clock and data alignment and programmable digital test pattern  
generation. The available digital test patterns include built-in  
deterministic and pseudorandom patterns, along with custom user-  
defined test patterns entered via the serial port interface (SPI).  
Test equipment  
GENERAL DESCRIPTION  
The AD9219 is a quad, 10-bit, 40/65 MSPS analog-to-digital con-  
verter (ADC) with an on-chip sample-and-hold circuit designed  
for low cost, low power, small size, and ease of use. The product  
operates at a conversion rate of up to 65 MSPS and is optimized for  
outstanding dynamic performance and low power in applications  
where a small package size is critical.  
The AD9219 is available in an RoHS compliant, 48-lead LFCSP. It is  
specified over the industrial temperature range of −40°C to +85°C.  
PRODUCT HIGHLIGHTS  
1. Small Footprint. Four ADCs are contained in a small, space-  
saving package.  
2. Low power of 94 mW/channel at 65 MSPS.  
3. Ease of Use. A data clock output (DCO) is provided that  
operates at frequencies of up to 390 MHz and supports  
double data rate (DDR) operation.  
4. User Flexibility. The SPI control offers a wide range of flexible  
features to meet specific system requirements.  
The ADC requires a single 1.8 V power supply and LVPECL-/  
CMOS-/LVDS-compatible sample rate clock for full performance  
operation. No external reference or driver components are  
required for many applications.  
5. Pin-Compatible Family. This includes the AD9287 (8-bit),  
AD9228 (12-bit), and AD9259 (14-bit).  
Rev. E  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2006–2011 Analog Devices, Inc. All rights reserved.  
 
 
 
 
 

AD9219ABCPZ-65 替代型号

型号 品牌 替代类型 描述 数据表
AD9287ABCPZ-100 ADI

类似代替

Serial LVDS 1.8 V ADC
AD9228ABCPZ-40 ADI

类似代替

Quad, 12-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter

与AD9219ABCPZ-65相关器件

型号 品牌 获取价格 描述 数据表
AD9219ABCPZRL7-40 ADI

获取价格

Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V ADC
AD9219ABCPZRL7-65 ADI

获取价格

Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V ADC
AD9219BCPZ-40 ADI

获取价格

Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9219BCPZ-40 ROCHESTER

获取价格

4-CH 10-BIT FLASH METHOD ADC, SERIAL ACCESS, QCC48, 7 X 7 MM, ROHS COMPLIANT, MO-220VKKD-2
AD9219BCPZ-65 ADI

获取价格

Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9219BCPZ-65 ROCHESTER

获取价格

4-CH 10-BIT FLASH METHOD ADC, SERIAL ACCESS, QCC48, 7 X 7 MM, ROHS COMPLIANT, MO-220VKKD-2
AD9219BCPZRL-40 ADI

获取价格

Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9219BCPZRL-65 ADI

获取价格

Quad, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
AD9220 ADI

获取价格

Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters
AD9220_15 ADI

获取价格

Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters