AD8402AN10

更新时间： 2024-01-16 12:31:01

品牌	Logo	应用领域
亚德诺 - ADI		转换器电位器数字电位计电阻器光电二极管
页数	文件大小	规格书
20页	497K
描述
1-/2-/4-Channel Digital Potentiometers

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中文翻译

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技术参数
数据手册
替代型号

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AD8402AN10 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	DIP
包装说明：	DIP,	针数：	14
Reach Compliance Code：	unknown	风险等级：	5.78
其他特性：	IT CAN ALSO OPERATE FROM A 5V NOMINAL SUPPLY	标称带宽：	0.6 kHz
控制接口：	3-WIRE SERIAL	转换器类型：	DIGITAL POTENTIOMETER
JESD-30 代码：	R-PDIP-T14	JESD-609代码：	e0
长度：	19.05 mm	湿度敏感等级：	NOT APPLICABLE
功能数量：	2	位置数：	256
端子数量：	14	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT APPLICABLE
认证状态：	COMMERCIAL	电阻定律：	LINEAR
最大电阻器端电压：	5.5 V	最小电阻器端电压：
座面最大高度：	5.33 mm	标称供电电压：	3 V
表面贴装：	NO	标称温度系数：	500 ppm/ °C
温度等级：	AUTOMOTIVE	端子面层：	TIN LEAD
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT APPLICABLE
标称总电阻：	10000 Ω	宽度：	7.62 mm
Base Number Matches：	1

AD8402AN10 数据手册

AD8400/AD8402/AD8403–SPECIFICATIONS

1 k⍀ VERSION

ELECTRICAL CHARACTERISTICS ^{otherwise noted)}

(V_DD= +3 V ؎ 10% or + 5 V ؎ 10%, V_A= +V_DD, V_B= 0 V, –40؇C ≤ T_A≤ +85؇C unless

Parameter

Symbol

Conditions

Min

Typ¹

Max

Units

DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs

Resistor Differential NL²

Resistor Nonlinearity²

Nominal Resistance³

Resistance Tempco

Wiper Resistance

Nominal Resistance Match

R-DNL

R-INL

∆R_AB/∆T

R_W

R_WB, V_A= NC

T_A= +25°C, Model: AD840XYY1

V_AB= V_DD, Wiper = No Connect

I_W= 1 V/R_AB

–5

–4

0.8

–1

1.5

LSB

kΩ

ppm/°C

Ω

±1.5

1.2

700

100

∆R/R_O

CH 1 to 2, V_AB= V_DD, T_A= +25°C

0.75

DC CHARACTERISTICS POTENTIOMETER DIVIDER Specifications Apply to All VRs

Resolution

Bits

Integral Nonlinearity⁴

Differential Nonlinearity⁴

INL

DNL

–6

–4

–5

±2

–1.5

–2

–12

LSB

ppm/°C

LSB

V_DD= +5 V

V_DD= +3 V, T_A= +25°C

Code = 80_H

Code = FF_H

Code = 00_H

Voltage Divider Temperature Coefficent ∆V_W/∆T

Full-Scale Error

Zero-Scale Error

V_WFSE

V_WZSE

–20

RESISTOR TERMINALS

Voltage Range⁵

V_{A, B, W}

C_{A, B}

C_W

I_{DD_SD}

R_{W_SD}

V_DD

Capacitance⁶Ax, Bx

Capacitance⁶Wx

f = 1 MHz, Measured to GND, Code = 80_H

V_A= V_DD, V_B= 0 V, SHDN = 0

µA

Ω

120

0.01

Shutdown Supply Current⁷

Shutdown Wiper Resistance

100

V_A= V_DD, V_B= 0 V, SHDN = 0, V_DD= +5 V

DIGITAL INPUTS & OUTPUTS

Input Logic High

Input Logic Low

Input Logic High

Input Logic Low

V_IH

V_IL

V_IH

V_IL

V_OH

V_OL

I_IL

V_DD= +5 V

V_DD= +3 V

R_L= 1 kΩ to V_DD

I_OL= 1.6 mA, V_DD= +5 V

V_IN= 0 V or +5 V, V_DD= +5 V

2.4

µA

0.8

0.6

2.1

Output Logic High

Output Logic Low

Input Current

V_DD–0.1

0.4

±1

Input Capacitance⁶

C_IL

POWER SUPPLIES

Power Supply Range

V_DDRange

I_DD

P_DISS

PSS

2.7

5.5

Supply Current (CMOS)

Supply Current (TTL)⁸

Power Dissipation (CMOS)⁹

Power Supply Sensitivity

V_IH= V_DDor V_IL= 0 V

0.01

0.9

µA

µW

V_IH= 2.4 V or 0.8 V, V_DD= +5.5 V

V_IH= V_DDor V_IL= 0 V, V_DD= +5.5 V

∆V_DD= +5 V ± 10%

27.5

0.0035 0.008 %/%

PSS

∆V_DD= +3 V ± 10%

0.05

0.13

%/%

DYNAMIC CHARACTERISTICS^{6, 10}

Bandwidth –3 dB

Total Harmonic Distortion

BW_1K

THD_W

t_S

e_NWB

C_T

R = 1 kΩ

5,000

0.015

0.5

–65

kHz

µs

nV/√Hz

V_A= 1 V rms + 2 V dc, V_B= 2 V dc, f = 1 kHz

V_A= V_DD, V_B= 0 V, ±1% Error Band

R_WB= 500 Ω, f = 1 kHz, RS = 0

V_A= V_DD, V_B= 0 V

_WSettling Time

Resistor Noise Voltage

Crosstalk¹¹

NOTES FOR 1 kΩ VERSION

¹Typicals represent average readings at +25°C and V_DD= +5 V.

²Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. See Figure 30 test circuit.

I_W= 500 µA for V_DD= +3 V and I_W= 4 mA for V_DD= +5 V for 1 kΩ version.

³V_AB= V_DD, Wiper (V_W) = No Connect.

⁴INL and DNL are measured at V_Wwith the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V_A= V_DDand V_B= 0 V.

DNL Specification limits of ±1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 29 test circuit.

⁵Resistor terminals A, B, W have no limitations on polarity with respect to each other.

⁶Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining

resistor terminals are left open circuit.

⁷Measured at the Ax terminals. All Ax terminals are open circuited in shutdown mode.

⁸Worst case supply current consumed when input logic level at 2.4 V, standard characteristic of CMOS logic. See Figure 21 for a plot of I _DDversus logic voltage.

⁹P_DISSis calculated from (I_DD× V_DD). CMOS logic level inputs result in minimum power dissipation.

¹⁰All Dynamic Characteristics use V_DD= +5 V.

¹¹Measured at a V_Wpin where an adjacent V_Wpin is making a full-scale voltage change.

Specifications subject to change without notice.

REV. B

–4–

1 2 345 6 7...20

中文翻译

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AD8402AN10 替代型号

型号	品牌	替代类型	描述	数据表
AD8402ANZ10	ADI	完全替代	1-/2-/4-Channel Digital Potentiometers
MCP42010-E/P	MICROCHIP	功能相似	Single/Dual Digital Potentiometer with SPI⑩ I

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AD8402AR100-REEL	ADI	获取价格	1-/2-/4-Channel Digital Potentiometers
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AD8402AR1-REEL	ADI	获取价格	1-/2-/4-Channel Digital Potentiometers
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