AD8386JCPZ

更新时间： 2024-02-01 04:51:58

品牌	Logo	应用领域
亚德诺 - ADI		驱动器
页数	文件大小	规格书
20页	378K
描述
10-Bit, 12-Channel Output Decimating LCD Driver

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AD8386JCPZ 数据手册

AD8386

Table 4. 64-Lead LFCSP_VQ Pin Function Descriptions

Pin No.

Mnemonic Function

NC No Connect

DB0 to DB9 Data Input

Description

1, 2

3 to 12

No Internal Connection.

10-Bit Data Input. MSB = DB(9).

While the SEN input is LOW, one 12-bit serial word is loaded into the

serial DAC on the rising edges of the SCL.

SDI

Serial Data Input

SEN

Serial DAC Enable

A falling edge of this input initiates a loading cycle. While this input is held

LOW, the serial DAC is enabled and data is loaded on every rising edge of

SCL. The output is updated on the rising edge of a valid SEN. A valid

SEN must remain LOW for at least three SCL cycles. While this input is

held HIGH, the control DAC is disabled.

SCL

GCTL

Serial Data Clock

Output Mode Control

Serial Data Clock.

When this input is HIGH, the output mode is determined by the function

programmed into the serial interface. When LOW, the output mode is

controlled by the GSW input.

GSW

TSW

Output Mode Switch

Thermal Switch

When GCTL is LOW and this input is HIGH, the video outputs and VAO

operate normally. When GCTL and this input are both LOW, the video

outputs and VAO are asynchronously forced to AGND, regardless of

the function programmed into the serial interface. This function operates

when AVCC power is OFF but requires DVCC power supply to be ON.

When this input is LOW, the thermal protection circuit is disabled. When

HIGH, the thermal protection circuit is enabled. This pin has a 10 kΩ

internal pull-down resistor.

19, 64

20, 63

DVCC

DGND

AGNDS

Digital Power Supply

Digital Ground

Analog Ground

Digital Power Supply.

Digital Supply Return.

Analog Supply Return.

22, 23, 24

SVRL, SVRH Serial DAC Reference Voltage The voltage applied between these pins sets the serial DAC full-scale voltage.

VAO

Serial DAC Output

Analog Power Supply

Bypass

This output voltage is updated in the rising edge of the SEN input.

Analog Power Supply.

AVCCS

BYP

A 0.1 μF capacitor connected between this pin and AGND ensures

optimum settling time.

28, 32, 36,

AGND11 to Analog Ground

Analog Supply Returns.

40, 44, 48, 52 AGND0

29, 31, 33, 35, VID11 to

37, 39, 41, 43, VID0

45, 47, 49, 51

Analog Output

These pins are directly connected to the analog inputs of the LCD panel.

30, 34, 38,

42, 46, 50

AVCC10, 11 Analog Power Supply

to AVCC0, 1

Analog Power Supplies.

VRL

Video Center Reference

The voltage applied to this pin sets the video center voltage. The video

outputs are above this reference while the INV = HIGH and below this

reference while INV = LOW.

54, 55

VRH

Full-Scale Reference

Analog Power Supply

Analog Ground

Test Pin

The full-scale video output voltage is VFS = 2 × (VRH − VRL).

Analog Power Supply.

Analog Supply Return.

AVCCD

AGNDD

TSTA

Connect this pin to AGND.

R/L

Right/Left Select

A new data loading sequence begins on the left with Channel 0 when

this input is LOW, and on the right with Channel 11 when this input is HIGH.

INV

Invert

When this input is HIGH, the VIDx output voltages are above VRL. When

LOW, the VIDx outputs voltages are below VRL. The state of INV is latched

on the first rising CLK edge after XFR is detected. The VIDx outputs change

on the rising CLK edge after the next XFR is detected.

XFR

CLK

Transfer/Start Sequence

Clock

The state of XFR is detected on the rising edge of CLK. Data is transferred to

the outputs and a new loading sequence begins on the next rising edge of

CLK after XFR is detected HIGH.

Video Data Clock.

Rev. 0 | Page 9 of 20

1...6 7 8910 11 12...20

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与AD8386JCPZ相关器件

型号	品牌	获取价格	描述	数据表
AD8387	ADI	获取价格	High Performance, 12-Bit, 12-Channel Decimating, LCD DecDriver
AD8387-EB	ADI	获取价格	High Performance, 12-Bit, 12-Channel Decimating, LCD DecDriver
AD8387JSVZ	ADI	获取价格	High Performance, 12-Bit, 12-Channel Decimating, LCD DecDriver
AD8389	ADI	获取价格	Triple, 6-Channel LCD Timing Delay-Locked Loop
AD8389ACPZ	ADI	获取价格	Triple, 6-Channel LCD Timing Delay-Locked Loop
AD8389ACPZ	ROCHESTER	获取价格	SPECIALTY CONSUMER CIRCUIT, QCC48, LEAD FREE, MO-220-VKKD-2, LFCSP-48
AD8390	ADI	获取价格	Low Power, High Output Current Differential Amplifier
AD8390A	ADI	获取价格	Low Power, High Output Current Differential Amplifier
AD8390AACPZ-R2	ADI	获取价格	Low Power, High Output Current Differential Amplifier
AD8390AACPZ-R7	ADI	获取价格	Low Power, High Output Current Differential Amplifier

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