Datasheet > AD8383ACPZ

AD8383ACPZ

更新时间： 2024-02-15 13:35:33

品牌	Logo	应用领域
罗彻斯特 - ROCHESTER		驱动接口集成电路
页数	文件大小	规格书
17页	1335K
描述
LIQUID CRYSTAL DISPLAY DRIVER, QCC48, 7 X 7 MM, 0.85 MM HEIGHT, MO-220VKKD-2, LFCSP-48

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AD8383ACPZ 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	7 X 7 MM, 0.85 MM HEIGHT, MO-220VKKD-2, LFCSP-48	针数：	48
Reach Compliance Code：	unknown	风险等级：	5.75
Is Samacsys：	N	数据输入模式：	PARALLEL
接口集成电路类型：	LIQUID CRYSTAL DISPLAY DRIVER	JESD-30 代码：	S-XQCC-N48
JESD-609代码：	e3	长度：	7 mm
湿度敏感等级：	3	复用显示功能：	NO
功能数量：	1	区段数：	6
端子数量：	48	最高工作温度：	75 °C
最低工作温度：		封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
认证状态：	COMMERCIAL	座面最大高度：	1 mm
标称供电电压：	3.3 V	电源电压1-Nom：	15.5 V
表面贴装：	YES	温度等级：	COMMERCIAL EXTENDED
端子面层：	MATTE TIN	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	40	宽度：	7 mm
Base Number Matches：	1

AD8383ACPZ 数据手册

AD8383

, ψ

JB JB

θ, ψ

AIR-CASE

AD8383

CASE

AIR-CASE

AIR-PCB

JC-BOTTOM

PCB

AMBIENT

JC-BOTTOM

PCB

AIR-PCB

PCB

Figure 14. Thermal Equivalent Circuit

ESTIMATED JUNCTION TEMPERATURE

Junction Temperature and Maximum Power Dissipation

Assuming no heat flows through the sides of the AD8383 pack-

age, heat flow from the AD8383 is through two paths. While

part of the total heat generated dissipates through the top of the

case, the remainder flows into the PCB to be dissipated.

In a thermal steady state represented by the simplified schema-

tic shown in Figure 15, heat flow from the die is partly through

the top of the case, causing a temperature drop (T_J– T_CASE), and

partly through the PCB, causing a temperature drop (T_J– T_PCB).

The junction temperature is calculated as follows:

Assuming there is no other heat-generating component near the

AD8383, the thermal equivalent circuit of a system that consists

of one AD8383 mounted on a PCB is shown in Figure 14.

−T^CASE

)

(T −T^PCB)

P = P^CASE+ P^PCB

PCB

The thermal resistance of the top of the case, θ_JC, is constant,

independent of the system variables, and well defined. θ_JC

depends on the thermal resistance of the molding compound.

θ^JCθ^PCBP +θ^PCBT^CASE+θ^JCT^PCB

T^J=

θJC +θPCB

The thermal resistance of the system, θ_JA, is system dependent

and therefore cannot be properly estimated. Although it is tra-

ditional to provide the thermal resistance of a JEDEC reference

system in the data sheet, its value may not be appropriate for all

systems and may result in large errors (>>25%).

where:

T_Jis the junction temperature

_CASEis the temperature of the top of the case (near the output

pins for the AD8383)

_PCBis the PCB temperature on the solder side (directly under

The thermal resistance of production PCBs, θ_JC, depends largely

on the particular PCB design, and, to some extent, the environ-

mental conditions specific to the particular system. Although θ_JB

is traditionally not provided on data sheets, a thermal character-

ization parameter, ψ_JB, of a JEDEC reference system is gaining

increasing acceptance. When the PCB thermal design near the

AD8383 closely approximates the PCB of the JEDEC reference

system, θ_JAapproaches ψ_JB.

the AD8383)

P is the total power dissipated by the AD8383

_JCis the thermal resistance of the top of the case

_PCBis the thermal resistance of the PCB

At a given maximum allowed junction temperature, the

maximum allowed power dissipation is

(

θ^JC+θ^PCB

θJCθPCB

)

T^CASET^PCB

⎡

⎤

P^MAX=

T^JMAX−

−

⎢

⎣

⎥

⎦

For thermally enhanced packages, the thermal resistance of the

exposed thermal paddle, θ_JC-BOTTOM, is very low and may

therefore be ignored.

θJC

θPCB

For a thermally optimized PCB, θ_JCcan be replaced with ψ_PCB

and the equation can be rewritten as

⎡

⎢

⎣

⎤

⎥

⎦

(

θ^JC+ ψ^PCB

θ^JCψ^PCB

)

T^CASET^PCB

P^MAX=

T^JMAX−

−

θJC

ψPCB

Rev. 0 | Page 12 of 16

1...10 11 121314 15 16 17

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