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AD8142-EVALZ PDF预览

AD8142-EVALZ

更新时间: 2024-02-17 06:17:31
品牌 Logo 应用领域
亚德诺 - ADI 驱动器
页数 文件大小 规格书
24页 451K
描述
Low Cost, Triple Differential Drivers

AD8142-EVALZ 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.7
差分输出:YES驱动器位数:3
输入特性:DIFFERENTIAL接口集成电路类型:LINE DRIVER
接口标准:GENERAL PURPOSEJESD-30 代码:S-XQCC-N24
JESD-609代码:e3长度:4 mm
湿度敏感等级:1功能数量:3
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
认证状态:Not Qualified最大接收延迟:
座面最大高度:0.8 mm最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:4 mmBase Number Matches:1

AD8142-EVALZ 数据手册

 浏览型号AD8142-EVALZ的Datasheet PDF文件第16页浏览型号AD8142-EVALZ的Datasheet PDF文件第17页浏览型号AD8142-EVALZ的Datasheet PDF文件第18页浏览型号AD8142-EVALZ的Datasheet PDF文件第20页浏览型号AD8142-EVALZ的Datasheet PDF文件第21页浏览型号AD8142-EVALZ的Datasheet PDF文件第22页 
AD8141/AD8142  
In Figure 43, VR, CM = VO, CM + VSHIFT. If VO, CM = 0 V and VSHIFT  
2 V, VR, CM is 2 V. This is because the receiver ground is shifted  
down by 2 V relative to the driver ground, and the common-  
mode level on the cable stays constant. It can be seen from this  
example that the most margin to absorb ground shifts exists  
when the center of the receiver input common-mode voltage  
range relative to its ground is the same as the output common-  
mode voltage of the driver with respect to its ground.  
=
SINGLE 5 V SUPPLY APPLICATION INFORMATION  
The AD8141 and AD8142 require a nominal voltage of 5 V  
across their VS+ and VS− power supply pins, and that their EPADs  
be connected to system ground; the voltage between VS+ and the  
local system ground must be greater than or equal to 2.5 V and  
less than or equal to 5 V. These requirements can be met by a  
single +5 V supply, or split supplies such as 2.5 V, +3 V/−2 V,  
and so on. Operating the AD8141 and AD8142 with 2.5 V  
supplies provides considerable power savings compared with  
other drivers operating at 5 V supplies, without any disadvantages  
with regard to input and output ranges in most cases.  
Most receivers operate with their input common-mode ranges  
centered at 0 V; therefore, the best case for the driver is to set its  
output common-mode voltage to 0 V. This is not possible for the  
AD8141 or AD8142on a single 5 V supply, but can be accomplished  
using split supplies. If a single 5 V supply is required, the rail-  
to-rail output allows the AD8141 output common-mode voltage  
to be set to less than 1 V to be as close as possible to the ideal  
setting of 0 V. Whereas the AD8141 has uncommitted VOCM inputs,  
the AD8142 has internal sync-encoding circuitry that fixes the  
nominal output common-mode voltage at 1.5 V above the negative  
rail. Each part has a resistive divider on the VOCM input that sets  
the nominal output common-mode voltage to 1.5 V above the  
negative rail when no external voltage is applied. The divider  
consists of a 8.75 kΩ resistor to VS+ and a 3.75 kΩ resistor to VS−,  
forming a Thevenin equivalent load of 2.6 kΩ to 30% of the  
voltage across the supplies. In the single 5 V supply case, the  
Thevenin load voltage is 30% of 5 V above 0 V, or 1.5 V.  
The receivers used with the AD8141 and AD8142, such as the  
AD8145, AD8143, AD8123, and AD8128, generally operate  
with split supplies, ranging from 5 V to 12 V. The split supply  
arrangement results in a receiver input common-mode range  
that is centered at 0 V relative to the local ground reference and  
ranges to within a volt or two from each rail. Ground potential  
differences normally exist between the driver end and the receiver  
end, and these differences cause the relative common-mode  
voltages between the driver and receiver to shift. See Figure 43  
for an example.  
DRIVER  
AD8141/AD8142  
49.9Ω  
+
100Ω  
UTP  
V
100Ω  
OCM  
49.9Ω  
+
+
O, CM  
+
R, CM  
V
V
+
V
SHIFT  
Figure 43. End-to-End Common-Mode Shifts due to Ground Shifts  
Rev. 0 | Page 19 of 24  
 
 

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