2
LC MOS, High Speed
1-, 4- & 8-Channel 10-Bit ADCs
a
AD7776/AD7777/AD7778*
FEATURES
FUNCTIO NAL BLO CK D IAGRAMS
AD7776: Single Channel
AD7777: 4-Channel
AD7778: 8-Channel
Fast 10-Bit ADC: 2.5 s Worst Case
+5 V Only
V
CC
CLKIN
CONTROL
REGISTER
10
Half-Scale Conversion Option
Fast Interface Port
Pow er-Dow n Mode
ADCREG1
DB0–DB9
10-BIT
ADC
A
IN
1
MUX
T/H
10
C
REFIN
V
BIAS
APPLICATIONS
HDD Servos
Instrum entation
REFIN
REFIN
RTN
REF
REFOUT
V
SWING
CONTROL LOGIC
GENERAL D ESCRIP TIO N
AD7776
AGND
T he AD7776, AD7777 and AD7778 are a family of high speed,
multichannel, 10-bit ADCs primarily intended for use in R/W
head positioning servos found in high density hard disk drives.
T hey have unique input signal conditioning features that make
them ideal for use in such single supply applications.
DGND
AGND
CS RD WR
BUSY/INT
V
CC
CLKIN
A
IN
A
IN
A
IN
A
IN
1
2
3
4
CONTROL
REGISTER
By setting a bit in a control register within both the four-channel
version, AD7777, and the eight-channel version, AD7778, the
input channels can either be independently sampled or any two
channels of choice can be simultaneously sampled. For all ver-
MUX
10
T/H
1
ADCREG2
ADCREG1
1
DB0–DB9
10-BIT
ADC
10
C
REFIN
sions the specified input signal range is of the form VBIAS
±
VSWING. H owever, if the RT N pin is biased at, say, 2 V the
V
BIAS
analog input signal range becomes 0 V to +2 V for all input
channels. T his is covered in more detail under the section
Changing the Analog Input Voltage Range. T he voltage VBIAS
is the offset of the ADC’s midpoint code from ground and is
supplied either by an onboard reference available to the user
(REFOUT ) or by an external voltage reference applied to
REFIN. T he full-scale range (FSR) of the ADC is equal to
2 VSWING where VSWING is nominally equal to REFIN/2. Addi-
tionally, when placed in the half-scale conversion mode, the
value of REFIN is converted. T his allows the channel offset(s)
to be measured.
REFIN
T/H
2
MUX
2
V
SWING
REF
REFOUT
RTN
AGND
AD7777
CONTROL LOGIC
REFIN
DGND AGND
V
CC
CLKIN
A 1
IN
A 2
IN
A 3
IN
A 4
IN
A 5
IN
CONTROL
REGISTER
Control register loading and ADC register reading, channel se-
lect and conversion start are under the control of the µP. T he
twos complemented coded ADCs are easily interfaced to a stan-
dard 16-bit MPU bus via their 10-bit data port and standard
microprocessor control lines.
MUX
1
10
T/H
1
ADCREG2
ADCREG1
A 6
IN
A 7
IN
A 8
IN
DB0–DB9
10-BIT
ADC
10
C
REFIN
V
BIAS
T he AD7776/AD7777/AD7778 are fabricated in linear compat-
ible CMOS (LC2MOS), an advanced, mixed technology process
that combines precision bipolar circuits with low power CMOS
logic. T he AD7776 is available in a 24-pin SOIC package; the
AD7777 is available in both 28-pin DIP and 28-pin SOIC pack-
ages; the AD7778 is available in a 44-pin PQFP package.
REFIN
T/H
2
MUX
2
V
SWING
REF
REFOUT
RTN
AGND
AD7778
CONTROL LOGIC
REFIN
*P r otected by U.S. P atent No. 4,990,916.
DGND AGND
RD
BUSY/INT
WR
CS
REV. 0
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