1 MSPS,12-Bit ADCs
Data Sheet
AD7475/AD7495
FEATURES
FUNCTIONAL BLOCK DIAGRAM
V
DD
Fast throughput rate: 1 MSPS
Specified for VDD of 2.7 V to 5.25 V
Low power
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
T/H
V
IN
REF IN
4.5 mW max at 1 MSPS with 3 V supplies
10.5 mW max at 1 MSPS with 5 V supplies
Wide input bandwidth: 68 dB SNR at 300 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
SCLK
SDATA
CS
CONTROL
LOGIC
V
DRIVE
AD7475
High speed serial interface
SPI-/QSPI™-/MICROWIRE-/DSP-compatible
On-board reference: 2.5 V (AD7495 only)
Standby mode: 1 μA max
GND
V
DD
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
8-lead MSOP and SOIC packages
T/H
V
IN
APPLICATIONS
REF OUT
BUF
2.5V
Battery-powered systems
Personal digital assistants
Medical instruments
SCLK
SDATA
CS
CONTROL
LOGIC
REFERENCE
Mobile communications
Instrumentation and control systems
Data acquisition systems
Optical sensors
V
DRIVE
AD7495
GND
Figure 1.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD7475/AD74951 are 12-bit, high speed, low power,
successive-approximation ADCs that operate from a single
2.7 V to 5.25 V power supply with throughput rates up to 1 MSPS.
They contain a low noise, wide bandwidth track-and-hold
amplifier that can handle input frequencies above 1 MHz.
1. The AD7475 offers 1 MSPS throughput rates with 4.5 mW
power consumption.
2. Single-supply operation with VDRIVE function. The
AD7475/AD7495 operate from a single 2.7 V to 5.25 V
supply. The VDRIVE function allows the serial interface to
connect directly to either 3 V or 5 V processor systems
The conversion process and data acquisition are controlled
using
and the serial clock, allowing the devices to interface
CS
with microprocessors or DSPs. The input signal is sampled on
the falling edge of and conversion is initiated at this point.
independent of VDD
.
3. Flexible power/serial clock speed management. The
conversion rate is determined by the serial clock, allowing
the conversion time to be reduced through the serial clock
speed increase. The devices also feature shutdown modes
to maximize power efficiency at lower throughput rates.
This allows the average power consumption to reduce while
not converting. Power consumption is 1 μA when in full
shutdown.
CS
The conversion time is determined by the SCLK frequency.
There are no pipeline delays associated with the device.
The AD7475/AD7495 use advanced design techniques to
achieve very low power dissipation at high throughput rates.
With 3 V supplies and a 1 MSPS throughput rate, the AD7475
consumes just 1.5 mA, while the AD7495 consumes 2 mA. With
5 V supplies and 1 MSPS, the current consumption is 2.1 mA
for the AD7475 and 2.6 mA for the AD7495.
4. No pipeline delay. The devices feature a standard successive
approximation ADC with accurate control of the sampling
instant via a
input and once-off conversion control.
The analog input range for the devices is 0 V to REF IN. The
2.5 V reference for the AD7475 is applied externally to the REF IN
pin, while the AD7495 has an on-board 2.5 V reference.
CS
1Protected by U.S. Patent No. 6,681,332
Rev. C
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