Preliminary Technical Data
AD7367
The AD7367 requires ꢀDD and ꢀSS dual supplies for the high
CAPACITIVE
DAC
voltage analog input structures. These supplies must be equal to
or greater than ±11.±ꢀ. See Table 6 for the requirements on
these supplies. The AD7367 requires a low voltage 4.7±ꢀ to ±.2±
ꢀ AꢀCC supply to power the ADC core, a 4.7±ꢀ to ±.2±ꢀ DꢀCC
supply for the Digital Power and a 2.7ꢀ to ±.2±ꢀ ꢀDRIꢀE supply
for the interface power.
A
V
IN
CONTROL
LOGIC
SW1
B
SW2
COMPARATOR
Channel selection is made via the ADDR pin as shown in
AGND
Figure 4 ADC Conversion Phase
Table 8. The logic level on the ADDR pin is latched on the rising
edge of BUSY for the next conversion, not the one in progress.
When power is first supplied to the AD7367 the default channel
selection will be ꢀA1 and ꢀB1.
ANALOG INPUTS
Each ADC in the AD7367 has two Single Ended Analog Inputs.
Figure ± shows the equivalent circuit of the analog input
structure of the AD7367. The two diodes provide ESD
protection. Care must be taken to ensure that the analog input
signals never exceed the supply rails by more than 300 mꢀ. This
causes these diodes to become forward-biased and starts
conducting current into the substrate. These diodes can
conduct up to 10 mA without causing irreversible damage to
the part. Capacitor C1 in Figure ± is typically ± pF and can
primarily be attributed to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about TBD Ω.
Capacitor C2 is the ADC’s sampling capacitors with a
capacitance of approximately TBD pF for the ±10ꢀ input range
and approximately TBD pF for all other input ranges.
Table 8. Channel Selection
ADDR
Channels Selected
ꢀA1, ꢀB1
0
1
ꢀA2, ꢀB2
Transfer Function
The AD7367 output coding is two’s complement. The designed
code transitions occur at successive integer LSB values (i.e. 1
LSB, 2 lSB, and so on). The LSB size is dependant on the analog
input range selected.
Table 9 LSB sizes for each Analog Input Range.
V
DD
Input Range
±10 ꢀ
Full Scale Range/4096
20 ꢀ/16384
LSB Size
1.22mꢀ
0.61mꢀ
0.61mꢀ
D
C2
R1
V
0
IN
C1
D
±± ꢀ
10 ꢀ/16384
V
SS
0 to 10 ꢀ
10ꢀ/16384
Figure 5 Equivalent Analog Input Structure
The ideal transfer characteristic is shown in Figure 6
The AD7367 can handle true bipolar input voltages. The Analog
input can be set to one of three ranges; ±10ꢀ, ±±ꢀ, 0-10ꢀ. The
logic levels on pins RANGE0 and RANGE1 determine which
input range is selected as outlined in Table 7. These range bits
should not be changed during the acquisition time prior to a
conversion but may change at any other time.
011...111
011...110
000...001
000...000
111...111
Table 7. Analog Input Range Selection
RANGE1
RANGE0
Range Selected
±10ꢀ
100...010
100...001
100...000
0
0
1
1
0
1
0
1
-FSR/2 + 1LSB
+FSR/2 - 1LSB
0V
±±ꢀ
ANALOG INPUT
0 to 10ꢀ
Figure 6.Transfer Characteristic
Do not program
Rev. PrD | Page 11 of 16
5秒后页面跳转
AT24C256芯片手册参数分析、引脚说明、读写程序示例
LAN8720A的替代型号推荐、资料手册数据分析、特点介绍
SS8550数据手册：应用场景、主要参数分析、特性分析
UC3845全面解析：资料手册参数、引脚详解、维修技巧与替代型号推荐
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
