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AD7265BCP PDF预览

AD7265BCP

更新时间: 2024-02-15 14:30:45
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 转换器
页数 文件大小 规格书
29页 1593K
描述
DUAL 3-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, QCC32, LEAD FREE, MO-220-VHHD-2, LFCSP-32

AD7265BCP 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:32
Reach Compliance Code:unknown风险等级:5.38
最大模拟输入电压:5.25 V最小模拟输入电压:
最长转换时间:0.875 µs转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:S-XQCC-N32JESD-609代码:e0
长度:5 mm最大线性误差 (EL):0.0244%
湿度敏感等级:3模拟输入通道数量:3
位数:12功能数量:2
端子数量:32最高工作温度:125 °C
最低工作温度:-40 °C输出位码:BINARY, 2'S COMPLEMENT BINARY
输出格式:SERIAL封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):240
采样速率:1 MHz采样并保持/跟踪并保持:TRACK
座面最大高度:1 mm标称供电电压:3 V
表面贴装:YES温度等级:AUTOMOTIVE
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:5 mm
Base Number Matches:1

AD7265BCP 数据手册

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AD7265  
Pin No. Mnemonic  
Description  
28, 30  
DOUTB, DOUT  
A
Serial Data Outputs. The data output is supplied to each pin as a serial data stream. The bits are clocked out on  
the falling edge of the SCLK input and 14 SCLKs are required to access the data. The data simultaneously appears  
on both pins from the simultaneous conversions of both ADCs. The data stream consists of two leading zeros  
followed by the 12 bits of conversion data. The data is provided MSB first. If CS is held low for 16 SCLK cycles  
rather than 14, then two trailing zeros appear after the 12 bits of data. If CS is held low for a further 16 SCLK  
cycles on either DOUTA or DOUTB, the data from the other ADC follows on the DOUT pin. This allows data from a  
simultaneous conversion on both ADCs to be gathered in serial format on either DOUTA or DOUTB using only one  
serial port. See the Serial Interface section.  
31  
32  
VDRIVE  
DVDD  
Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface operates.  
This pin should be decoupled to DGND. The voltage at this pin may be different than that at AVDD and DVDD but  
should never exceed either by more than 0.3 V.  
Digital Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for all digital circuitry on the AD7265. The DVDD  
and AVDD voltages should ideally be at the same potential and must not be more than 0.3 V apart even on a  
transient basis. This supply should be decoupled to DGND.  
Rev. A | Page 8 of 28  

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