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AD694JNZ PDF预览

AD694JNZ

更新时间: 2024-01-13 06:16:23
品牌 Logo 应用领域
亚德诺 - ADI 模拟IC信号电路光电二极管PC
页数 文件大小 规格书
16页 163K
描述
4–20 mA Transmitter

AD694JNZ 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:0.64
Samacsys Confidence:3Samacsys Status:Released
2D Presentation:https://componentsearchengine.com/2D/0T/169175.1.2.pngSchematic Symbol:https://componentsearchengine.com/symbol.php?partID=169175
PCB Footprint:https://componentsearchengine.com/footprint.php?partID=1691753D View:https://componentsearchengine.com/viewer/3D.php?partID=169175
Samacsys PartID:169175Samacsys Image:https://componentsearchengine.com/Images/9/AD694JNZ.jpg
Samacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/1/AD694JNZ.jpgSamacsys Pin Count:16
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Dual-In-Line Packages
Samacsys Footprint Name:N-16Samacsys Released Date:2015-06-25 00:00:00
Is Samacsys:N模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:R-PDIP-T16JESD-609代码:e3
长度:20.13 mm功能数量:1
端子数量:16最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT APPLICABLE
认证状态:Not Qualified座面最大高度:5.33 mm
最大供电电压 (Vsup):36 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):24 V表面贴装:NO
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:7.62 mmBase Number Matches:1

AD694JNZ 数据手册

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AD694  
FUNCTIONAL DESCRIPTION  
The operation of the AD694 can best be understood by dividing  
the circuit into three functional parts (see Figure 1). First, a  
single supply input amplifier buffers the high level, single-ended  
input signal. The buffer amplifier drives the second section, a  
voltage to current (V/I) converter, that makes a 0 to 16 mA sig-  
nal dependent current.  
Typical Minimum Supply Voltage vs. Temperature for 2 V  
and 10 V Full Scale  
Figure 1. Functional Block Diagram  
The third section, a voltage reference and offset generator, is re-  
sponsible for providing the 4 mA offset current signal.  
BUFFER AMPLIFIER  
The buffer amplifier is a single supply amplifier that may be  
used as a unity gain buffer, an output amplifier for a current  
output DAC, or as a gain block to amplify low level signals. The  
amplifier’s PNP input stage has a common-mode range that ex-  
tends from a few hundred mV below ground to within 2.5 V of  
VS. The Class A output of the amplifier appears at Pin 1 (FB).  
The output range extends from about 1 mV above common to  
within 2.5 V of VS when the amplifier is operated as a follower.  
The amplifier can source a maximum load of 5 k, but can sink  
only as much as its internal 10 kpulldown resistor allows.  
Maximum RL vs. Supply Voltage  
Voltage Reference Power Supply Rejection  
IOUT: Voltage Compliance vs. Temperature  
V/I CONVERTER  
The ground referenced, input signal from the buffer amplifier is  
converted to a 0 to 0.8 mA current by A2 and level shifted to  
the positive supply. A current mirror then multiplies this signal  
by a factor of 20 to make the signal current of 0 to 16 mA. This  
technique allows the output stage to drive a load to within 2 V  
of the positive supply (VS). Amplifier A2 forces the voltage at  
Pin 1 across resistors R1 and R2 by driving the Darlington tran-  
sistor, Q2. The high gain Darlington transmits the resistor cur-  
rent to its collector and to R3 (900 ). A3 forces the level  
shifted signal across the 45 resistor to get a current gain of 20.  
The transfer function of the V/I stage is therefore:  
IOUT = 20 ×VPIN1 / R1 + R2  
(
)
resulting in a 0-16 mA output swing for a 0–10 V input. Tying  
Pin 4 (2 V FS) to ground shorts out R2 and results in a 2 V  
full-scale input for a 16 mA output span.  
The output stage of the V/I converter is of a unique design that  
allows the IOUT pin to drive a load below the common (sub-  
strate) potential of the device. The output transistor can always  
drive a load to a point 36 V below the positive supply (VS). An  
–4–  
REV. B  

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