a
GSM 3 V Receiver IF Subsystem
AD6458
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Fully Compliant with Standard and Enhanced GSM
Specification
LO
–12 dBm Input 1 dB Compression Point
–2 dBm Input Third Order Intercept
10 dB SSB Noise Figure (330 ⍀)
DC–400 MHz RF and LO Bandwidths
Linear IF Amplifier
I
PLO
BPF
RF
Q
Linear-in-dB and Stable over Temperature Voltage
Gain Control
Quadrature Demodulator
AGC
FREF
AD6458
Onboard Phase-Locked Quadrature Oscillator
Demodulates IFs from 5 MHz to 50 MHz
Low Power
9 mA at Midgain
1 A Sleep Mode Operation
3.0 V to 3.6 V Operation
Interfaces to AD7013, AD7015 and AD6421 Baseband
Converters
20-Lead SSOP
quadrature VCO which is externally phase-locked to the IF
GENERAL DESCRIPTION
signal drives the I and Q demodulators. This locked reference
signal is normally provided by an external VCTCXO under the
control of the radio’s digital processor. The AD6458 can also
provide demodulation of N-PSK and N-QAM in many non-
TDMA systems when used with external analog carrier recovery
systems such as the Costas Loop. Finally, the VCO can be
phase-locked to a frequency which is deliberately offset from the
IF, as in the case of a Beat-Frequency Oscillator (BFO), result-
ing in the product detection of CW or SSB.
The AD6458 is a 3 V, low power receiver IF subsystem for
operation at input frequencies as high as 400 MHz and IFs from
5 MHz up to 50 MHz. It is optimized for operation in GSM,
DCS1800 and PCS1900 receivers. It consists of a mixer, IF
amplifier, I and Q demodulators, a phase-locked quadrature
oscillator, precise AGC subsystem, and a biasing system with
external power-down.
The low noise, high intercept mixer of the AD6458 is a
doubly-balanced Gilbert cell type. It has a nominal –12 dBm
input-referred 1 dB compression point and a –2 dBm input-
referred third-order intercept. The mixer section of the AD6458
also includes a local oscillator (LO) preamplifier, which lowers
the required LO drive to –16 dBm.
The AD6458 uses supply voltages from 3.0 V to 3.6 V over the
temperature range of –40°C to +85°C. Operation is enabled by
a CMOS logical level; response time is typically <80 µs. When
disabled, the standby current is reduced to 1 µA.
The AD6458 comes in a 20-lead shrink small outline (SSOP)
surface-mount package.
The gain control input accepts an external gain-control voltage
input from an external AGC detector or a DAC. It provides an
80 dB gain range with 27 mV/dB gain scaling.
The I and Q demodulators provide inphase and quadrature
baseband outputs to interface with Analog Devices’ AD7013
(IS54, TETRA, MSAT) and AD7015 and AD6421 (GSM,
DCS1800, PCS1900) baseband converters. An onboard
REV. 0
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use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 1997