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AD5685RBCPZ-RL7 PDF预览

AD5685RBCPZ-RL7

更新时间: 2024-11-29 07:18:51
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
32页 824K
描述
Quad, 16-/14-/12-Bit nanoDAC

AD5685RBCPZ-RL7 数据手册

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Quad, 16-/14-/12-Bit nanoDAC+  
with 2 ppm/°C Reference, SPI Interface  
Data Sheet  
AD5686R/AD5685R/AD5684R  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
High relative accuracy (INL): 2 LSB maximum @ 16 bits  
Low drift 2.5 V reference: 2 ppm/°C typical  
V
GND  
V
REF  
DD  
Tiny package: 3 mm × 3 mm, 16-lead LFCSP  
2.5V  
REFERENCE  
AD5686R/AD5685R/AD5684R  
V
LOGIC  
Total unadjusted error (TUE): 0.1ꢀ of FSR maximum  
Offset error: 1.5 mV maximum  
STRING  
DAC A  
INPUT  
DAC  
V
V
V
V
A
B
C
D
OUT  
OUT  
OUT  
OUT  
REGISTER  
REGISTER  
SCLK  
SYNC  
SDIN  
SDO  
BUFFER  
BUFFER  
BUFFER  
BUFFER  
Gain error: 0.1ꢀ of FSR maximum  
High drive capability: 20 mA, 0.5 V from supply rails  
User selectable gain of 1 or 2 (GAIN pin)  
Reset to zero scale or midscale (RSTSEL pin)  
1.8 V logic compatibility  
50 MHz SPI with readback or daisy chain  
Low glitch: 0.5 nV-sec  
Robust 4 kV HBM and 1.5 kV FICDM ESD rating  
Low power: 3.3 mW at 3 V  
STRING  
DAC B  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC C  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC D  
INPUT  
REGISTER  
DAC  
REGISTER  
POWER-ON  
RESET  
GAIN  
×1/×2  
POWER-  
DOWN  
LOGIC  
LDAC RESET  
RSTSEL  
GAIN  
2.7 V to 5.5 V power supply  
Figure 1.  
−40°C to +105°C temperature range  
APPLICATIONS  
Optical transceivers  
Base-station power amplifiers  
Process control (PLC I/O cards)  
Industrial automation  
Data acquisition systems  
Table 1. Quad nanoDAC+ Devices  
Interface Reference 16-Bit  
GENERAL DESCRIPTION  
14-Bit  
12-Bit  
The AD5686R/AD5685R/AD5684R, members of the  
nanoDAC+® family, are low power, quad, 16-/14-/12-bit  
buffered voltage output DACs. The devices include a 2.5 V,  
2 ppm/°C internal reference (enabled by default) and a gain  
select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V  
(gain = 2). All devices operate from a single 2.7 V to 5.5 V  
supply, are guaranteed monotonic by design, and exhibit less  
than 0.1% FSR gain error and 1.5 mV offset error performance.  
The devices are available in a 3 mm × 3 mm LFCSP and a  
TSSOP package.  
SPI  
I2C  
Internal  
Internal  
AD5686R  
AD5696R  
AD5685R AD5684R  
AD5695R AD5694R  
PRODUCT HIGHLIGHTS  
1. High Relative Accuracy (INL).  
AD5686R (16-bit): 2 LSB maximum  
AD5685R (14-bit): 1 LSB maximum  
AD5684R (12-bit): 1 LSB maximum  
2. Low Drift 2.5 V On-Chip Reference.  
2 ppm/°C typical temperature coefficient  
5 ppm/°C maximum temperature coefficient  
3. Two Package Options.  
The AD5686R/AD5685R/AD5684R also incorporate a power-  
on reset circuit and a RSTSEL pin that ensures that the DAC  
outputs power up to zero scale or midscale and remains there  
until a valid write takes place. Each part contains a per-channel  
power-down feature that reduces the current consumption of  
the device to 4 μA at 3 V while in power-down mode.  
3 mm × 3 mm, 16-lead LFCSP  
16-lead TSSOP  
The AD5686R/AD5685R/AD5684R employ a versatile SPI  
interface that operates at clock rates up to 50 MHz, and all  
devices contain a VLOGIC pin intended for 1.8 V/3 V/5 V logic.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2012 Analog Devices, Inc. All rights reserved.  
 
 
 
 
 

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