2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit nanoDACs® with
I2C®-Compatible Interface, Tiny SC70 Package
AD5602/AD5612/AD5622
FUNCTIONAL BLOCK DIAGRAM
FEATURES
V
Single 8-, 10-, 12-bit DACs, 2 LSB INL
6-lead SC70 package
DD
GND
POWER-ON
RESET
Micropower operation: 100 μA max @ 5 V
Power-down to <150 nA @ 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to 0 V with brownout detection
3 power-down functions
AD5602/AD5612/AD5622
REF(+)
DAC
REGISTER
OUTPUT
BUFFER
V
8-/10-/12-BIT
DAC
OUT
I2C-compatible serial interface supports standard (100 kHz),
fast (400 kHz), and high speed (3.4 MHz) modes
INPUT
CONTROL
LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
On-chip output buffer amplifier, rail-to-rail operation
APPLICATIONS
ADDR
SCL SDA
Process control
Figure 1.
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Table 1. Related Devices
Part No.
AD5601/AD5611/AD5621 2.7 V to 5.5 V, <100 μA, 8-, 10-, 12-bit
nanoDAC with SPI® interface in a
Description
tiny SC70 package
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD5602/AD5612/AD5622, members of the nanoDAC
family, are single 8-, 10-, 12-bit buffered voltage-out DACs that
operate from a single 2.7 V to 5.5 V supply, consuming <100 μA
at 5 V. These DACs come in tiny SC70 packages. Each DAC
contains an on-chip precision output amplifier that allows rail-
to-rail output swing to be achieved.
1. Available in a 6-lead SC70 package.
2. Maximum 100 μA power consumption, single-supply
operation. These parts operate from a single 2.7 V to 5.5 V
supply, typically consuming 0.2 mW at 3 V and 0.4 mW at
5 V, making them ideal for battery-powered applications.
3. The on-chip output buffer amplifier allows the output of
the DAC to swing rail-to-rail with a typical slew rate of
0.5 V/μs.
The AD5602/AD5612/AD5622 use a 2-wire I2C-compatible
serial interface that operates in standard (100 kHz), fast
(400 kHz), and high speed (3.4 MHz) modes.
4. Reference derived from the power supply.
5. Standard, fast, and high speed mode I2C interface.
6. Designed for very low power consumption.
The references for AD5602/AD5612/AD5622 are derived from
the power supply inputs to give the widest dynamic output range.
Each part incorporates a power-on reset circuit that ensures the
DAC output powers up to 0 V and remains there until a valid
write takes place to the device. The parts contain a power-down
feature that reduces the current consumption of the devices to
<150 nA at 3 V and provides software-selectable output loads
while in power-down mode. The parts are put into power-down
mode over the serial interface. The low power consumption of
the AD5602/AD5612/AD5622 in normal operation makes them
ideally suited for use in portable battery-operated equipment. The
typical power consumption is 0.4 mW at 5 V.
7. Power-down capability. When powered down, the DAC
typically consumes <150 nA at 3 V.
8. Power-on reset and brownout detection.
Rev. B
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