Datasheet > AD5602BCPZ-2-RL7

AD5602BCPZ-2-RL7

更新时间： 2024-11-29 19:55:51

品牌	Logo	应用领域
亚德诺 - ADI		光电二极管转换器
页数	文件大小	规格书
24页	649K
描述
2.7 V to 5.5 V, µA, 8-Bit nanoDAC® with I<sup>2</sup>C Compatible Interface, Tiny SC70 Package

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AD5602BCPZ-2-RL7 数据手册

2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit nanoDACs with

I²C Compatible Interface in LFCSP and SC70

Data Sheet

AD5602/AD5612/AD5622

FEATURES

FUNCTIONAL BLOCK DIAGRAM

GND

Single 8-, 10-, 12-bit DACs, 2 LSB INL

6-lead LFCSP and SC70 packages

Micropower operation: 100 μA maximum at 5 V

Power down to <150 nA at 3 V

POWER-ON

RESET

AD5602/AD5612/AD5622

REF(+)

2.7 V to 5.5 V power supply

Guaranteed monotonic by design

DAC

OUTPUT

BUFFER

8-/10-/12-BIT

DAC

OUT

Power-on reset to 0 V with brownout detection

3 power-down functions

I²C compatible serial interface supports standard (100 kHz),

fast (400 kHz), and high speed (3.4 MHz) modes

On-chip output buffer amplifier, rail-to-rail operation

Qualified for automotive applications

INPUT

CONTROL

LOGIC

POWER-DOWN

CONTROL LOGIC

RESISTOR

NETWORK

ADDR

SCL SDA

APPLICATIONS

Figure 1.

Process control

Data acquisition systems

Table 1. Related Devices

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators

Device No.

Description

AD5601/AD5611/AD5621 2.7 V to 5.5 V, <100 μA, 8-, 10-, 12-bit

nanoDAC with SPI interface in tiny

LFCSP and SC70 packages

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

The AD5602/AD5612/AD5622, members of the nanoDAC®

family, are single 8-, 10-, 12-bit buffered voltage-out digital-to-

analog converters (DAC) that operate from a single 2.7 V to

5.5 V supply, consuming <100 μA at 5 V. These DACs come in

tiny LFCSP and SC70 packages. Each DAC contains an on-chip

precision output amplifier that allows rail-to-rail output swing

to be achieved.

The AD5602/AD5612/AD5622 use a 2-wire I²C compatible

serial interface that operates in standard (100 kHz), fast (400 kHz),

and high speed (3.4 MHz) modes.

1. Available in 6-lead LFCSP and SC70 packages.

2. Maximum 100 μA power consumption, single-supply

operation. These devices operate from a single 2.7 V to 5.5 V

supply, typically consuming 0.2 mW at 3 V and 0.4 mW at

5 V, making them ideal for battery-powered applications.

3. The on-chip output buffer amplifier allows the output of

the DAC to swing rail-to-rail with a typical slew rate of

0.5 V/μs.

4. Reference derived from the power supply.

5. Standard, fast, and high speed mode I²C interface.

6. Designed for very low power consumption.

7. Power-down capability. When powered down, the DAC

typically consumes <150 nA at 3 V.

The references for AD5602/AD5612/AD5622 derive from the

power supply inputs to give the widest dynamic output range. Each

device incorporates a power-on reset circuit that ensures the DAC

output powers up to 0 V and remains there until a valid write takes

place to the device. The devices contain a power-down feature

that reduces the current consumption of the devices to <150 nA

at 3 V and provides software selectable output loads while in

power-down mode. The devices are put into power-down mode

over the serial interface. The low power consumption of the

AD5602/AD5612/AD5622 in normal operation makes them

ideally suited for use in portable, battery operated equipment.

The typical power consumption is 0.4 mW at 5 V.

8. Power-on reset and brownout detection.

Rev. D

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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