5秒后页面跳转
捷配首页

Datasheet > AD5533ABCZ-1
AD5533ABCZ-1 PDF预览

AD5533ABCZ-1

更新时间： 2024-01-20 06:24:40
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
16页 312K
描述
IC SAMPLE AND HOLD AMPLIFIER, PBGA74, 12 X 12 MM, LFBGA-74, Sample and Hold Circuit

阅读下载

中文翻译

获取价格

AD5533ABCZ-1 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：LBGA,针数：74
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.35
最长采集时间：16 µs放大器类型：SAMPLE AND HOLD CIRCUIT
最大模拟输入电压：3 V最小模拟输入电压：
JESD-30 代码：S-PBGA-B74JESD-609代码：e1
长度：12 mm湿度敏感等级：3
功能数量：1端子数量：74
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LBGA
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
采样并保持/跟踪并保持：SAMPLE座面最大高度：1.7 mm
供电电压上限：7 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：TIN SILVER COPPER端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：12 mm
Base Number Matches：1

AD5533ABCZ-1 数据手册

 浏览型号AD5533ABCZ-1的Datasheet PDF文件第6页浏览型号AD5533ABCZ-1的Datasheet PDF文件第7页浏览型号AD5533ABCZ-1的Datasheet PDF文件第8页浏览型号AD5533ABCZ-1的Datasheet PDF文件第10页浏览型号AD5533ABCZ-1的Datasheet PDF文件第11页浏览型号AD5533ABCZ-1的Datasheet PDF文件第12页 
AD5533  
TERMINOLOGY  
DC Crosstalk  
VIN to VOUT Nonlinearity  
This is the dc change in the output level of one channel in response  
to a full-scale change in the output of all other channels. It is  
expressed in µV.  
This is a measure of the maximum deviation from a straight line  
passing through the endpoints of the VIN versus VOUT transfer  
function. It is expressed as a percentage of the full-scale span.  
Output Settling Time  
Offset Error  
This is the time taken from when BUSY goes high to when the  
output has settled to 0.018%.  
This is a measure of the output error when VIN = 70 mV. Ideally,  
with VIN = 70 mV:  
Acquisition Time  
This is the time taken for the VIN input to be acquired. It is the  
length of time that BUSY stays low.  
VOUT = Gain × 70 – Gain – 1 ×V  
mV  
(
)
(
(
)
)
OFFS _ IN  
Offset error is a measure of the difference between VOUT (actual)  
and VOUT (ideal). It is expressed in mV and can be positive or  
negative. See Figure 5.  
OFFS_IN Settling Time  
This is the time taken from a 0 V–3 V step change in input volt-  
age on OFFS_IN until the output has settled to within 0.39%.  
Gain Error  
Digital Feedthrough  
This is a measure of the span error of the analog channel. It is the  
deviation in slope of the transfer function. See Figure 5. It is  
calculated as:  
This is a measure of the impulse injected into the analog outputs  
from the digital control inputs when the part is not being written  
to, i.e., CS/SYNC is high. It is specified in nV-s and is measured  
with a worst-case change on the Digital Input Pins, e.g., from all  
0s to all 1s and vice versa.  
Gain Error = Actual Full-Scale Output – Ideal Full-Scale  
Output – Offset Error  
where:  
Output Noise Spectral Density  
Ideal Full-Scale Output =  
This is a measure of internally generated random noise. Random  
noise is characterized as a spectral density (voltage per root Hertz).  
It is measured by loading all DACs to midscale and measuring  
noise at the output. It is measured in nV/(√Hz).  
Ideal Gain × 2.96 – Ideal Gain – 1 ×V  
(
(
)
)
OFFS _IN  
Ideal Gain = 3.52  
Output Temperature Coefficient  
This is a measure of the change in analog output with changes  
in temperature. It is expressed in ppm/°C.  
AC Crosstalk  
This is the area of the glitch that occurs on the output of one channel  
while another channel is acquiring. It is expressed in nV-s.  
DC Power Supply Rejection Ratio  
DC power supply rejection ratio (PSRR) is a measure of the  
change in the analog output for a change in the supply voltage  
(VDD and VSS). It is expressed in dBs. VDD and VSS are varied 5%.  
V
OUT  
GAIN ERROR +  
OFFSET ERROR  
IDEAL  
TRANSFER  
FUNCTION  
ACTUAL  
TRANSFER  
FUNCTION  
OFFSET  
ERROR  
70mV  
2.96  
0V  
3V  
V
IN  
LOWER  
DEAD BAND  
UPPER  
DEAD BAND  
Figure 5. ISHA Transfer Function  
REV. A  
–9–  
1...6789101112...16

中文翻译

下载PDF

AD5533ABCZ-1 替代型号

型号 品牌 替代类型 描述 数据表
AD5533ABC-1REEL ADI

完全替代

 		IC SAMPLE AND HOLD AMPLIFIER, PBGA74, 12 X 12 MM, LFBGA-74, Sample and Hold Circuit

与AD5533ABCZ-1相关器件

型号 品牌 描述 获取价格 数据表
AD5533B ADI 32-Channel Precision Infinite Sample-and-Hold

获取价格
AD5533BBC-1 ADI 32-Channel, 14-Bit DAC with Precision Infinite Sample-and-Hold Mode

获取价格
AD5535 ADI 32-Channel, 14-Bit DAC with Full-Scale Output Voltage Programmable from 50 V to 200 V

获取价格
AD5535ABC ADI 32-Channel, 14-Bit DAC with Full-Scale Output Voltage Programmable from 50 V to 200 V

获取价格
AD5535B ADI 32-Channel, 14-Bit DAC with Full-Scale Output Voltage Programmable from 50 V to 200 V

获取价格
AD5535BKBC ADI 32-Channel, 14-Bit DAC with Full-Scale Output Voltage Programmable from 50 V to 200 V

获取价格

与AD5533ABCZ-1相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证