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AD5325BRMZ1

更新时间: 2024-11-07 12:32:59
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 565K
描述
2.5 V to 5.5 V, 500 μA, 2-Wire Interface Interface

AD5325BRMZ1 数据手册

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2.5 V to 5.5 V, 500 μA, 2-Wire Interface  
Quad Voltage Output, 8-/10-/12-Bit DACs  
AD5305/AD5315/AD5325  
GENERAꢀ DESCRIPTION  
FEATURES  
AD5305: 4 buffered 8-bit DACs in 10-lead MSOP  
A version: 1 ꢀSB INꢀ, B version: 0.625 ꢀSB INꢀ  
AD5315: 4 buffered 10-bit DACs in 10-lead MSOP  
A version: 4 ꢀSB INꢀ, B version: 2.5 ꢀSB INꢀ  
AD5325: 4 buffered 12-bit DACs in 10-lead MSOP  
A version: 16 ꢀSB INꢀ, B version: 10 ꢀSB INꢀ  
ꢀow power operation: 500 μA @ 3 V, 600 μA @ 5 V  
2-wire (I2C®-compatible) serial interface  
2.5 V to 5.5 V power supply  
The AD5305/AD5315/AD53251 are quad 8-, 10-, and 12-bit  
buffered voltage output DACs in a 10-lead MSOP that operate  
from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V.  
Their on-chip output amplifiers allow rail-to-rail output swing  
with a slew rate of 0.7 V/μs. A 2-wire serial interface that  
operates at clock rates up to 400 kHz is used. This interface is  
SMBus compatible at VDD < 3.6 V. Multiple devices can be  
placed on the same bus.  
The references for the four DACs are derived from one  
reference pin. The outputs of all DACs can be updated  
simultaneously using the software LDAC function.  
Guaranteed monotonic by design over all codes  
Power-down to 80 nA @ 3 V, 200 nA @ 5 V  
Three power-down modes  
Double-buffered input logic  
Output range: 0 V to VREF  
Power-on reset to 0 V  
Simultaneous update of outputs (ꢀDAC function)  
Software clear facility  
Data readback facility  
On-chip rail-to-rail output buffer amplifiers  
Temperature range: −40°C to +105°C  
The parts incorporate a power-on reset circuit, which ensures  
that the DAC outputs power up to 0 V and remain there until a  
valid write takes place to the device. There is also a software  
clear function to reset all input and DAC registers to 0 V. The  
parts contain a power-down feature that reduces the current  
consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).  
The low power consumption of these parts in normal operation  
makes them ideally suited for portable battery-operated equip-  
ment. The power consumption is 3 mW at 5 V, 1.5 mW at 3 V,  
reducing to 1 ꢀW in power-down mode.  
APPꢀICATIONS  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
1 Protected by U.S. Patent No. 5,969,657 and 5,684,481.  
Industrial process control  
FUNCTIONAꢀ BꢀOCK DIAGRAM  
V
DD  
REF IN  
LDAC  
DAC  
REGISTER  
INPUT  
REGISTER  
STRING  
DAC A  
V
V
A
B
BUFFER  
BUFFER  
OUT  
OUT  
DAC  
REGISTER  
INPUT  
REGISTER  
SCL  
SDA  
STRING  
DAC B  
INTERFACE  
LOGIC  
DAC  
REGISTER  
INPUT  
REGISTER  
STRING  
DAC C  
V
V
C
D
BUFFER  
BUFFER  
OUT  
OUT  
A0  
DAC  
REGISTER  
INPUT  
REGISTER  
STRING  
DAC D  
POWER-DOWN  
LOGIC  
POWER-ON  
RESET  
AD5305/AD5315/AD5325  
GND  
Figure 1.  
Rev. G  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights ofthird parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 

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