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AD5323

更新时间: 2024-01-28 12:14:19
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
18页 227K
描述
+2.5 V to +5.5 V, 230 uA, Dual Rail-to-Rail Voltage Output 8-/10-/12-Bit DACs

AD5323 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.28
Is Samacsys:N最大模拟输出电压:5.499 V
最小模拟输出电压:0.001 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:5 mm最大线性误差 (EL):0.1953%
湿度敏感等级:1位数:12
功能数量:1端子数量:16
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:2.5/5.5 V认证状态:Not Qualified
座面最大高度:1.2 mm标称安定时间 (tstl):8 µs
子类别:Other Converters最大压摆率:0.4 mA
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

AD5323 数据手册

 浏览型号AD5323的Datasheet PDF文件第12页浏览型号AD5323的Datasheet PDF文件第13页浏览型号AD5323的Datasheet PDF文件第14页浏览型号AD5323的Datasheet PDF文件第15页浏览型号AD5323的Datasheet PDF文件第16页浏览型号AD5323的Datasheet PDF文件第18页 
AD5303/AD5313/AD5323  
t
1
SCLK  
t
2
t
14  
t
3
t
8
t
4
SYNC  
t
t
15  
6
t
5
DIN  
DB15  
DB0  
DB15  
DB15  
DB0  
DB0  
INPUT WORD FOR DAC N  
UNDEFINED  
INPUT WORD FOR DAC (N+1)  
INPUT WORD FOR DAC N  
SDO  
SCLK  
SDO  
t
13  
V
IH  
V
IL  
t
12  
Figure 45. Daisy-Chaining Timing Diagram  
Power Supply Bypassing and Grounding  
The power supply lines of the AD5303/AD5313/AD5323 should  
use as large a trace as possible to provide low impedance paths  
and reduce the effects of glitches on the power supply line. Fast  
switching signals such as clocks should be shielded with digital  
ground to avoid radiating noise to other parts of the board, and  
should never be run near the reference inputs. Avoid crossover  
of digital and analog signals. Traces on opposite sides of the  
board should run at right angles to each other. This reduces the  
effects of feedthrough through the board. A microstrip tech-  
nique is by far the best, but not always possible with a double-  
sided board. In this technique, the component side of the board  
is dedicated to ground plane while signal traces are placed on  
the solder side.  
In any circuit where accuracy is important, careful consideration  
of the power supply and ground return layout helps to ensure  
the rated performance. The printed circuit board on which the  
AD5303/AD5313/AD5323 is mounted should be designed so  
that the analog and digital sections are separated, and confined  
to certain areas of the board. If the AD5303/AD5313/AD5323  
is in a system where multiple devices require an AGND to  
DGND connection, the connection should be made at one  
point only. The star ground point should be established as close  
as possible to the AD5303/AD5313/AD5323. The AD5303/  
AD5313/AD5323 should have ample supply bypassing of 10 µF  
in parallel with 0.1 µF on the supply located as close to the  
package as possible, ideally right up against the device. The  
10 µF capacitors are the tantalum bead type. The 0.1 µF  
capacitor should have low Effective Series Resistance (ESR)  
and Effective Series Inductance (ESI), like the common  
ceramic types that provide a low impedance path to ground at  
high frequencies to handle transient currents due to internal  
logic switching.  
REV. 0  
17–  

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