2.5 V to 5.5 V, 230 μA, Dual Rail-to-Rail
Voltage Output 8-/10-/12-Bit DACs
AD5303/AD5313/AD5323
GENERAꢀ DESCRIPTION
FEATURES
AD5303: 2 buffered 8-bit DACs in 1 package
A version: 1 ꢀSB INꢀ, B version: 0.5 ꢀSB INꢀ
AD5313: 2 buffered 10-bit DACs in 1 package
A version: 4 ꢀSB INꢀ, B version: 2 ꢀSB INꢀ
AD5323: 2 buffered 12-bit DACs in 1 package
A version: 16 ꢀSB INꢀ, B version: 8 ꢀSB INꢀ
16-lead TSSOP package
Micropower operation: 300 μA @ 5 V (including reference
current)
Power-down to 200 nA @ 5 V, 50 nA @ 3 V
2.5 V to 5.5 V power supply
The AD5303/AD5313/AD5323 are dual 8-/10-/12-bit buffered
voltage output DACs in a 16-lead TSSOP package that operate
from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V.
Their on-chip output amplifiers allow the outputs to swing rail-to-
rail with a slew rate of 0.7 V/μs. The AD5303/AD5313/AD5323
utilize a versatile 3-wire serial interface that operates at clock
rates up to 30 MHz and is compatible with standard SPI, QSPI™,
MICROWIRE™, and DSP interface standards.
The references for the two DACs are derived from two reference
pins (one per DAC). These reference inputs may be configured
as buffered or unbuffered inputs. The parts incorporate a power-
on reset circuit, which ensures that the DAC outputs power up
to 0 V and remain there until a valid write to the device takes
Double-buffered input logic
Guaranteed monotonic by design over all codes
Buffered/unbuffered reference input options
Output range: 0 V to VREF or 0 V to 2 VREF
Power-on-reset to 0 V
CLR
place. There is also an asynchronous active low
clears both DACs to 0 V. The outputs of both DACs may be
LDAC
pin that
updated simultaneously using the asynchronous
input.
SDO daisy-chaining option
The parts contain a power-down feature that reduces the
current consumption of the devices to 200 nA at 5 V (50 nA
at 3 V) and provides software-selectable output loads while
in power-down mode. The parts may also be used in daisy-
chaining applications using the SDO pin.
ꢀDAC
Simultaneous update of DAC outputs via
CꢀR
pin
Asynchronous
facility
ꢀow power serial interface with Schmitt-triggered inputs
On-chip rail-to-rail output buffer amplifiers
APPꢀICATIONS
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated equip-
ment. The power consumption is 1.5 mW at 5 V and 0.7 mW at
3 V, reducing to 1 μW in power-down mode.
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
FUNCTIONAꢀ BꢀOCK DIAGRAM
V
V
A
DD
BUF A
REF
AD5303/AD5313/AD5323
POWER-ON
RESET
DAC
REGISTER
INPUT
REGISTER
STRING
DAC
V
OUT
A
BUFFER
SYNC
SCLK
DIN
INTERFACE
LOGIC
POWER-DOWN
LOGIC
RESISTOR
NETWORK
DAC
REGISTER
INPUT
REGISTER
STRING
DAC
V
OUT
B
BUFFER
SDO
GAIN-SELECT
LOGIC
RESISTOR
NETWORK
V B
REF
GND
DCEN
BUF B
LDAC
CLR
PD
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©1999–2007 Analog Devices, Inc. All rights reserved.
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