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AD5324ARM

更新时间: 2024-11-07 12:29:31
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器光电二极管
页数 文件大小 规格书
24页 357K
描述
2.5 V to 5.5 V, 500 μA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead Packages

AD5324ARM 数据手册

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2.5 V to 5.5 V, 500 μA, Quad Voltage Output  
8-/10-/12-Bit DACs in 10-Lead Packages  
AD5304/AD5314/AD5324  
Data Sheet  
FEATURES  
GENERAL DESCRIPTION  
The AD5304/AD5314/AD53241 are quad 8-, 10-, and 12-bit  
AD5304: 4 buffered 8-Bit DACs in 10-lead MSOP and  
buffered voltage output DACs in 10-lead MSOP and 10-lead  
LFCSP packages that operate from a single 2.5 V to 5.5 V supply,  
consuming 500 μA at 3 V. Their on-chip output amplifiers allow  
rail-to-rail output swing to be achieved with a slew rate of 0.7 V/μs.  
A 3-wire serial interface is used; it operates at clock rates up to  
30 MHz and is compatible with standard SPI, QSPI, MICROWIRE,  
and DSP interface standards.  
10-lead LFCSP  
A, W Version: 1 LSB INL, B Version: 0.625 LSB INL  
AD5314: 4 buffered 10-Bit DACs in 10-lead MSOP and  
10-lead LFCSP  
A, W Version: 4 LSB INL, B Version: 2.5 LSB INL  
AD5324: 4 buffered 12-Bit DACs in 10-lead MSOP and  
10-lead LFCSP  
A, W Version: 16 LSB INL, B Version: 10 LSB INL  
Low power operation: 500 μA @ 3 V, 600 μA @ 5 V  
2.5 V to 5.5 V power supply  
Guaranteed monotonic by design over all codes  
Power-down to 80 nA @ 3 V, 200 nA @ 5 V  
Double-buffered input logic  
The references for the four DACs are derived from one reference  
pin. The outputs of all DACs can be updated simultaneously using  
LDAC  
the software  
function. The parts incorporate a power-on  
reset circuit, and ensure that the DAC outputs power up to 0 V  
and remains there until a valid write takes place to the device.  
The parts contain a power-down feature that reduces the current  
consumption of the device to 200 nA @ 5 V (80 nA @ 3 V).  
Output range: 0 V to VREF  
Power-on reset to 0 V  
The low power consumption of these parts in normal operation  
makes them ideally suited to portable battery-operated equipment.  
The power consumption is 3 mW at 5 V, 1.5 mW at 3 V, reducing  
to 1 μW in power-down mode.  
LDAC  
Simultaneous update of outputs (  
function)  
Low power-, SPI®-, QSPI™-, MICROWIRE™-, and DSP-  
compatible 3-wire serial interface  
On-chip, rail-to-rail output buffer amplifiers  
Temperature range −40°C to +105°C  
Qualified for automotive applications  
APPLICATIONS  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
1 Protected by U.S. Patent No. 5,969,657.  
Industrial process controls  
FUNCTIONAL BLOCK DIAGRAM  
V
REFIN  
DD  
AD5304/AD5314/AD5324  
LDAC  
BUFFER  
BUFFER  
BUFFER  
BUFFER  
INPUT  
DAC  
STRING  
DAC A  
V
V
V
V
A
B
C
D
OUT  
OUT  
OUT  
OUT  
REGISTER  
REGISTER  
SCLK  
SYNC  
DIN  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC B  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC C  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC D  
POWER-ON RESET  
POWER-DOWN LOGIC  
GND  
Figure 1.  
Rev. H  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2011 Analog Devices, Inc. All rights reserved.  
 

AD5324ARM 替代型号

型号 品牌 替代类型 描述 数据表
AD5325ARMZ ADI

完全替代

2.5 V to 5.5 V, 500 muA, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs
AD5324ARMZ ADI

完全替代

2.5 V to 5.5 V, 500 μA, Quad Voltage Output
AD5314ARMZ ADI

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2.5 V to 5.5 V, 500 μA, Quad Voltage Output

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