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AD5231BRUZ50-REEL7 PDF预览

AD5231BRUZ50-REEL7

更新时间: 2024-02-14 11:40:52
品牌 Logo 应用领域
亚德诺 - ADI 数字电位计存储
页数 文件大小 规格书
28页 536K
描述
Nonvolatile Memory, 1024-Position Digital Potentiometer

AD5231BRUZ50-REEL7 数据手册

 浏览型号AD5231BRUZ50-REEL7的Datasheet PDF文件第19页浏览型号AD5231BRUZ50-REEL7的Datasheet PDF文件第20页浏览型号AD5231BRUZ50-REEL7的Datasheet PDF文件第21页浏览型号AD5231BRUZ50-REEL7的Datasheet PDF文件第23页浏览型号AD5231BRUZ50-REEL7的Datasheet PDF文件第24页浏览型号AD5231BRUZ50-REEL7的Datasheet PDF文件第25页 
AD5231  
Data Sheet  
Lifetime Specification (A117) at a specific junction temperature  
(TJ = 55°C). As part of this qualification procedure, the  
Flash/EE memory is cycled to its specified endurance limit,  
described previously, before data retention is characterized.  
This means that the Flash/EE memory is guaranteed to retain  
its data for its full specified retention lifetime every time the  
Flash/EE memory is reprogrammed. It should also be noted  
that retention lifetime, based on an activation energy of 0.6 eV,  
derates with TJ, as shown in Figure 45. For example, the data is  
retained for 100 years at 55°C operation, but reduces to 15 years  
at 85°C operation. Beyond these limits, the part must be  
reprogrammed so that the data can be restored.  
FLASH/EEMEM RELIABILITY  
The Flash/EE memory array on the AD5231 is fully qualified  
for two key Flash/EE memory characteristics, namely Flash/EE  
memory cycling endurance and Flash/EE memory data  
retention.  
Endurance quantifies the ability of the Flash/EE memory to be  
cycled through many program, read, and erase cycles. In real  
terms, a single endurance cycle is composed of four  
independent, sequential events. These events are defined as  
Initial page erase sequence  
Read/verify sequence  
Byte program sequence  
Second read/verify sequence  
300  
250  
200  
During reliability qualification, Flash/EE memory is cycled  
from 0x000 to 0x3FF until a first fail is recorded signifying the  
endurance limit of the on-chip Flash/EE memory.  
ANALOG DEVICES  
150  
As indicated in the Specifications section, the AD5231 Flash/EE  
memory endurance qualification has been carried out in  
accordance with JEDEC Specification A117 over the industrial  
temperature range of −40°C to +85°C. The results allow the  
specification of a minimum endurance figure over supply and  
temperature of 100,000 cycles, with an endurance figure of  
700,000 cycles being typical of operation at 25°C.  
TYPICAL PERFORMANCE  
AT T = 55°C  
J
100  
50  
0
40  
50  
60  
T JUNCTIONTEMPERATURE (°C)  
J
70  
80  
90  
100  
110  
Retention quantifies the ability of the Flash/EE memory to  
retain its programmed data over time. Again, the AD5231 has  
been qualified in accordance with the formal JEDEC Retention  
Figure 45. Flash/EE Memory Data Retention  
Rev. D | Page 22 of 28  
 
 

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