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AD4680BCPZ-RL7 PDF预览

AD4680BCPZ-RL7

更新时间： 2022-05-14 22:21:38
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
29页 427K
描述
Differential Inputs, 1 MSPS/500 kSPS, Dual Simultaneous Sampling SAR ADCs

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AD4680BCPZ-RL7 数据手册

 浏览型号AD4680BCPZ-RL7的Datasheet PDF文件第23页浏览型号AD4680BCPZ-RL7的Datasheet PDF文件第24页浏览型号AD4680BCPZ-RL7的Datasheet PDF文件第25页浏览型号AD4680BCPZ-RL7的Datasheet PDF文件第26页浏览型号AD4680BCPZ-RL7的Datasheet PDF文件第27页浏览型号AD4680BCPZ-RL7的Datasheet PDF文件第29页 
AD4680/AD4681  
Data Sheet  
Bits  
Bit Name  
Description  
Reset Access  
5
AL_B_HIGH  
Alert B High. The alert indication high bit indicates if a conversion result for the respective  
input channel exceeds the value set in the ALERT_HIGH_THRESHOLD register. This fault bit is  
sticky and remains set until the register is read.  
0x0  
R
1: alert indication.  
0: no alert indication.  
4
AL_B_LOW  
Alert B Low. The alert indication low bit indicates if a conversion result for the respective input 0x0  
channel exceeds the value set in the ALERT_LOW_THRESHOLD register. This fault bit is sticky  
and remains set until the register is read.  
R
1: alert indication.  
0: no alert indication.  
[3:2]  
1
RESERVED  
AL_A_HIGH  
Reserved.  
0x0  
0x0  
R
R
Alert A High. The alert indication high bit indicates if a conversion result for the respective  
input channel exceeds the value set in the ALERT_HIGH_THRESHOLD register. This fault bit is  
sticky and remains set until the register is read.  
1: alert indication.  
0: no alert indication.  
0
AL_A_LOW  
Alert A Low. The alert indication low bit indicates if a conversion result for the respective input 0x0  
channel exceeds the value set in the ALERT_LOW_THRESHOLD register. This fault bit is sticky  
and remains set until the register is read.  
R
1: alert indication.  
0: no alert indication.  
ALERT_LOW_THRESHOLD REGISTER  
Address: 0x4, Reset: 0x0800, Name: ALERT_LOW_THRESHOLD  
15 14 13 12 11 10  
9
8
7
6
5
4
3
2
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
[15:12] ADDRESSING (R/W)  
[11:0] ALERT_LOW (R/W)  
Addressing  
Alert Low  
Table 19. Bit Descriptions for ALERT_LOW_THRESHOLD  
Bits Bit Name Description  
Reset Access  
[15:12] ADDRESSING Addressing. Bits[15:12] define the address of the relevant register. See the Addressing  
Registers section for further details.  
0x0  
R/W  
[11:0]  
ALERT_LOW  
Alert Low. Bits[11:0] from ALERT_LOW move to the MSBs of the internal ALERT_LOW register,  
Bits[15:4]. The remaining Bits[3:0] of the internal register are fixed at 0x0. Sets an alert when  
the converter result is below ALERT_LOW_THRESHOLD and the alert is disabled when it is  
above ALERT_LOW_THRESHOLD.  
0x800 R/W  
ALERT_HIGH_THRESHOLD REGISTER  
Address: 0x5, Reset: 0x07FF, Name: ALERT_HIGH_THRESHOLD  
15 14 13 12 11 10  
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
[15:12] ADDRESSING (R/W)  
[11:0] ALERT_HIGH (R/W)  
Addressing  
Alert High  
Table 20. Bit Descriptions for ALERT_HIGH_THRESHOLD  
Bits Bit Name Description  
Reset Access  
[15:12] ADDRESSING Addressing. Bits[15:12] define the address of the relevant register. See the Addressing  
Registers section for further details.  
0x0  
R/W  
[11:0]  
ALERT_HIGH Alert High. Bits[11:0] from ALERT_HIGH move to the MSBs of the internal ALERT_HIGH register, 0x7FF R/W  
Bits[15:4]. The remaining Bits[3:0] of the internal register are fixed at 0xF. Sets an alert when  
the converter result is above the ALERT_HIGH_THRESHOLD register and the alert is disabled  
when the converter result is below the ALERT_HIGH_THRESHOLD register.  
Rev. 0 | Page 28 of 29  
 
 
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