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AD4680BCPZ-RL7 PDF预览

AD4680BCPZ-RL7

更新时间: 2022-05-14 22:21:38
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
29页 427K
描述
Differential Inputs, 1 MSPS/500 kSPS, Dual Simultaneous Sampling SAR ADCs

AD4680BCPZ-RL7 数据手册

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AD4680/AD4681  
Data Sheet  
CONFIGURATION1 REGISTER  
Address: 0x1, Reset: 0x0000, Name: CONFIGURATION1  
15 14 13 12 11 10  
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
[15:12] ADDRESSING (R/W)  
[0] PMODE (R/W)  
Addressing  
Power-Down Mode.  
[11:10] RESERVED  
[1] REFSEL (R/W)  
Reference Select.  
[9] OS_MODE (R/W)  
Oversampling Mode.  
[2] RES (R/W)  
Resolution.  
[8:6] OSR (R/W)  
Oversampling Ratio.  
[3] ALERT_EN (R/W)  
Enable Alert Indicator Function.  
[5] CRC_W (R/W)  
CRC Write.  
[4] CRC_R (R/W)  
CRC Read.  
Table 16. Bit Descriptions for CONFIGURATION1 Register  
Bits Bit Name Description  
Reset Access  
[15:12] ADDRESSING Addressing. Bits[15:12] define the address of the relevant register. See the Addressing  
Registers section for further details.  
0x0  
R/W  
[11:10] RESERVED  
Reserved.  
0x0  
0x0  
R
R/W  
9
OS_MODE  
Oversampling Mode. Enables the rolling average oversampling mode of the ADC.  
0: disable.  
1: enable.  
[8:6]  
OSR  
Oversampling Ratio. Sets the oversampling ratio for all the ADCs in the rolling average mode.  
Rolling average mode supports oversampling ratios of ×2, ×4, and ×8.  
0x0  
R/W  
000: disabled.  
001: 2×.  
010: 4×.  
011: 8×.  
100: disabled.  
101: disabled.  
110: disabled.  
111: disabled.  
5
CRC_W  
CRC Write. Controls the CRC functionality for the SDI interface. When setting this bit from a 0  
to a 1, the command must be followed by a valid CRC to set this configuration bit. If a valid  
CRC is not received, the entire frame is ignored. If the bit is set to 1, it requires a CRC to clear it to 0.  
0x0  
R/W  
0: no CRC function.  
1: CRC function.  
4
3
CRC_R  
CRC Read. Controls the CRC functionality for the SDOA and SDOB/ALERT interface.  
0x0  
0x0  
R/W  
R/W  
0: no CRC function.  
1: CRC function.  
ALERT_EN  
Enable Alert Indicator Function. This alert function (on the SDOB/ALERT pin) is enabled when  
the SDO bit (Register 0x2, Bit 8) = 1. Otherwise, the ALERT_EN bit is ignored.  
0: SDOB.  
1: ALERT.  
2
RES  
Resolution. Sets the size of the conversion result data. If OSR = 0, these bits are ignored, and  
the resolution is set to the default resolution.  
0x0  
R/W  
0: normal resolution.  
1: 2-bit higher resolution.  
1
0
REFSEL  
PMODE  
Reference Select. Selects the ADC reference source.  
0: selects internal reference.  
1: selects external reference.  
Power-Down Mode. Sets the power modes.  
0: normal mode.  
0x0  
0x0  
R/W  
R/W  
1: shutdown mode.  
Rev. 0 | Page 26 of 29  
 

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