Single Supply, 24-Bit, Sigma-Delta ADC with ± ±0 V,
±0 MΩ Inputs and Buffered Low Level Inputs
Data Sheet
AD4±±6
On-chip 2.5 V reference
FEATURES
0.12% accuracy at 25°C, 5 ppm/°C (typical) drift
Internal or external clock
Power supplies
AVDD to AVSS = 4.5 V to 5.5 V
IOVDD to DGND = 2 V to 5.5 V
Total IDD (AVDD + IOVDD) = 6.15 mA
Temperature range: −40°C to +105°C
3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)
SPI, QSPI, MICROWIRE, and DSP compatible
24-bit ADC with integrated analog front end
Fast and flexible output rate: 1.25 SPS to 62.5 kSPS
Channel scan data rate
12,422 SPS per channel (80 µs settling, sinc5 + sinc1)
20,618 SPS per channel (48 µs settling, sinc3)
85 dB rejection of 50 Hz and 60 Hz at 20 SPS per channel
10 V inputs, 6 differential or 11 single-ended
Pin absolute maximum rating: 65 V
Absolute input pin voltage up to 20 V
≥10 MΩ impedance
APPLICATIONS
Low level direct ADC input
Process control
PLC and DCS modules
Instrumentation and measurement
VREF inputs, 2 differential or 4 single-ended
Absolute input pin voltage, AVDD to AVSS
True rail-to-rail analog input buffers
FUNCTIONAL BLOCK DIAGRAM
AVDD REGCAPA
REF– REF+ REFOUT
IOVDD REGCAPD
BUFFERED
PRECISION
REFERENCE
1.8V
LDO
1.8V
LDO
VIN0
VIN1
INTERNAL
REFERENCE
VIN2
PRECISION
VOLTAGE
DIVIDER
VIN3
RAIL-TO-RAIL
VIN4
REFERENCE
VIN5
INPUT BUFFERS
CS
VIN6
>10MΩ
VIN7
SCLK
VIN8
VIN9
SERIAL
INTERFACE
DIGITAL
FILTER
DIN
VIN10
VINCOM
Σ-Δ ADC
DOUT/RDY
MUX
VBIAS–
SYNC
ERROR
ADCIN11
ADCIN12
ADCIN13
ADCIN14
ADCIN15
CRYSTAL AND INTERNAL
CLOCK OSCILLATOR
CIRCUITRY
GPIO CONTROL
TEMPERATURE
SENSOR
AVSS
DGND
GPIO0 GPIO1 GPO2 GPO3
XTAL1
CLKIO/XTAL2
Figure 1.
Rev. 0
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