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AD1928 PDF预览

AD1928

更新时间: 2024-01-16 13:13:16
品牌 Logo 应用领域
亚德诺 - ADI 解码器编解码器
页数 文件大小 规格书
32页 434K
描述
2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec

AD1928 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.78
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQFP-G48
JESD-609代码:e3长度:7 mm
湿度敏感等级:3功能数量:1
端子数量:48最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
Base Number Matches:1

AD1928 数据手册

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2 ADC/8 DAC with PLL,  
192 kHz, 24-Bit Codec  
AD1928  
FEATURES  
GENERAL DESCRIPTION  
PLL-generated or direct master clock  
Low EMI design  
108 dB DAC/107 dB ADC dynamic range and SNR  
−94 dB THD + N  
3.3 V single supply  
Tolerance for 5 V logic inputs  
Supports 24 bits and 8 kHz to 192 kHz sample rates  
Differential ADC input  
Single-ended DAC output  
Log volume control with autoramp function  
SPI® controllable for flexibility  
Software-controllable clickless mute  
Software power-down  
Right-justified, left-justified, I2S-justified, and TDM modes  
Master and slave modes up to 16-channel input/output  
48-lead LQFP  
The AD1928 is a high performance, single-chip codec that  
provides two analog-to-digital converters (ADCs) with differ-  
ential input and eight digital-to-analog converters (DACs) with  
single-ended output using the Analog Devices, Inc., patented  
multibit sigma-delta (Σ-Δ) architecture. An SPI port is included,  
allowing a microcontroller to adjust volume and many other  
parameters. The AD1928 operates from 3.3 V digital and analog  
supplies. The AD1928 is available in a 48-lead (single-ended  
output) LQFP package. Other members of this family include a  
differential DAC output and I2C® control port versions.  
The AD1928 is designed for low EMI. This consideration is  
apparent in both the system and circuit design architectures.  
By using the on-board PLL to derive the master clock from the  
LR clock or from an external crystal, the AD1928 eliminates the  
need for a separate high frequency master clock and can be  
used with a suppressed bit clock. The digital-to-analog and  
analog-to-digital converters are designed using the latest  
Analog Devices continuous time architectures to further  
minimize EMI. By using 3.3 V supplies, power consumption is  
minimized, further reducing emissions.  
APPLICATIONS  
Automotive audio systems  
Home theater systems  
Set-top boxes  
Digital audio effects processors  
FUNCTIONAL BLOCK DIAGRAM  
DIGITAL AUDIO  
INPUT/OUTPUT  
AD1928  
SERIAL DATA PORT  
DAC  
DAC  
DAC  
DAC  
DAC  
DAC  
DAC  
DAC  
SDATA  
OUT  
SDATA  
IN  
QUAD  
DEC  
FILTER  
48kHz/  
96kHz/  
192kHz  
DIGITAL  
FILTER  
AND  
VOLUME  
CONTROL  
ADC  
ADC  
ANALOG  
AUDIO  
INPUTS  
CLOCKS  
ANALOG  
AUDIO  
OUTPUTS  
TIMING MANAGEMENT  
AND CONTROL  
(CLOCK AND PLL)  
CONTROL PORT  
2
PRECISION  
VOLTAGE  
REFERENCE  
SPI/I C  
CONTROL DATA  
INPUT/OUTPUT  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2007 Analog Devices, Inc. All rights reserved.  
 

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