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AD1938WBSTZ PDF预览

AD1938WBSTZ

更新时间: 2024-01-26 08:09:23
品牌 Logo 应用领域
亚德诺 - ADI 解码器编解码器
页数 文件大小 规格书
32页 472K
描述
4 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec

AD1938WBSTZ 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:LFQFP,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.36
其他特性:WITH PROGRAMMABLE PLL最大模拟输出电压:2.48 V
最小模拟输出电压:-2.48 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:S-PQFP-G48JESD-609代码:e3
长度:7 mm湿度敏感等级:3
功能数量:1端子数量:48
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.6 mm标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm
Base Number Matches:1

AD1938WBSTZ 数据手册

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4 ADC/8 DAC with PLL,  
192 kHz, 24-Bit Codec  
AD1938  
Data Sheet  
FEATURES  
GENERAL DESCRIPTION  
PLL generated or direct master clock  
Low EMI design  
108 dB DAC/107 dB ADC dynamic range and SNR  
−94 dB THD + N  
3.3 V single supply  
Tolerance for 5 V logic inputs  
The AD1938 is a high performance, single-chip codec that pro-  
vides four analog-to-digital converters (ADCs) with input and  
eight digital-to-analog converters (DACs) with single-ended output  
using the Analog Devices, Inc., patented multibit sigma-delta (Σ-Δ)  
architecture. An SPI port is included, allowing a microcontroller  
to adjust volume and many other parameters.  
Supports 24 bits and 8 kHz to 192 kHz sample rates  
Differential ADC input  
Single-ended DAC output  
Log volume control with autoramp function  
SPI controllable for flexibility  
The AD1938 operates from 3.3 V digital and analog supplies.  
The AD1938 is available in a 48-lead (single-ended output)  
LQFP package. Other members of this family include a diffe-  
rential DAC output and I2C® control port version.  
The AD1938 is designed for low EMI. This consideration is  
apparent in both the system and circuit design architectures.  
By using the on-board PLL to derive the master clock from  
the LR clock or from an external crystal, the AD1938 elimi-  
nates the need for a separate high frequency master clock and  
can also be used with a suppressed bit clock. The DACs and  
ADCs are designed using the latest Analog Devices continuous  
time architectures to further minimize EMI. By using 3.3 V  
supplies, power consumption is minimized, further reducing  
emissions.  
Software-controllable clickless mute  
Software power-down  
Right-justified, left-justified, I2S-justified, and TDM modes  
Master and slave modes up to 16-channel input/output  
48-lead LQFP package  
Qualified for automotive applications  
APPLICATIONS  
Automotive audio systems  
Home Theater Systems  
Set-top boxes  
Digital audio effects processors  
FUNCTIONAL BLOCK DIAGRAM  
DIGITAL AUDIO  
INPUT/OUTPUT  
AD1938  
SERIAL DATA PORT  
DAC  
DAC  
DAC  
DAC  
DAC  
DAC  
DAC  
DAC  
SDATA  
OUT  
SDATA  
IN  
ADC  
ADC  
ADC  
ADC  
DIGITAL  
FILTER  
AND  
VOLUME  
CONTROL  
ANALOG  
AUDIO  
INPUTS  
CLOCKS  
ANALOG  
AUDIO  
OUTPUTS  
DIGITAL  
FILTER  
TIMING MANAGEMENT  
AND CONTROL  
(CLOCK AND PLL)  
SPI CONTROL PORT  
PRECISION  
VOLTAGE  
REFERENCE  
CONTROL DATA  
INPUT/OUTPUT  
Figure 1.  
Rev. E  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2006–2013 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

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