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AD1893JST PDF预览

AD1893JST

更新时间: 2024-01-28 08:21:19
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER /
页数 文件大小 规格书
21页 900K
描述
SPECIALTY CONSUMER CIRCUIT, PQFP44, 10 X 10 MM, LQFP-44

AD1893JST 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:QFP
包装说明:LQFP,针数:44
Reach Compliance Code:unknown风险等级:5.09
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQFP-G44
JESD-609代码:e0长度:10 mm
湿度敏感等级:3功能数量:1
端子数量:44最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):240
认证状态:COMMERCIAL座面最大高度:1.6 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:10 mmBase Number Matches:1

AD1893JST 数据手册

 浏览型号AD1893JST的Datasheet PDF文件第5页浏览型号AD1893JST的Datasheet PDF文件第6页浏览型号AD1893JST的Datasheet PDF文件第7页浏览型号AD1893JST的Datasheet PDF文件第9页浏览型号AD1893JST的Datasheet PDF文件第10页浏览型号AD1893JST的Datasheet PDF文件第11页 
AD1893  
THEORY OF OPERATION  
then passed to a zero-order hold functional block (physically  
implemented as a register, Plot D in Figure 1) and then asyn-  
chronously resampled at the output sample frequency (Plot E in  
Figure 1). This resampling can be thought of as a decimation  
operation since only a very few samples out of the great many  
interpolated samples are retained. The output values represent  
the “nearest” values, in a temporal sense, produced by the inter-  
polation operation. There is always some error in the output  
sample amplitude due to the fact that the output sampling switch  
does not close at a time that exactly corresponds to a point on the  
fine time scale of the interpolated sequence. However, this error  
can be made arbitrarily small by using a very large interpolation  
ratio. The AD1893 SamplePort ASRC uses an equivalent IRATIO  
of 65,536 to provide 16-bit accuracy (–96 dB THD+N) across  
the 0 kHz to 20 kHz audio band.  
There are at least two logically equivalent methods of explaining  
the concept of asynchronous sample rate conversion: the high  
speed interpolation/decimation model and the polyphase filter  
bank model. Using the AD1893 SamplePort does not require  
understanding either model. This section is included for those  
who wish a deeper understanding of its operation.  
Interpolation/Decimation Model  
In the high speed interpolation/decimation model, illustrated in  
Figure 1, the sampled data input signal (Plot A in Figure 1) is  
interpolated at some ratio (IRATIO) by inserting IRATIO-1  
zero valued samples between each of the original input signal  
samples (Plot B in Figure 1). The frequency domain charac-  
teristics of the input signal are unaltered by this operation, ex-  
cept that the zero-padded sequence is considered to be sampled  
at a frequency which is the product of original sampling fre-  
quency multiplied by IRATIO.  
The number of FIR filter taps and associated coefficients is  
approximately 4 million. The equivalent FIR filter convolution  
frequency (or “upsample” frequency) is 3.2768 GHz, and the  
fine time scale has resolution of about 300 ps. Various propri-  
etary efficiencies are exploited in the AD1893 ASRC to reduce  
the complexity and throughput requirements of the hardware  
implied by this interpolation/decimation model.  
The zero-padded values are fed into a digital FIR low-pass filter  
(Plot C in Figure 1) to smooth or integrate the sequence, and  
limit the bandwidth of the filter output to 20 kHz. The inter-  
polated output signal has been quantized to a much finer time  
scale than the original sequence. The interpolated sequence is  
D
E
A
B
C
FIR LOW-  
PASS  
FILTER  
ZERO ORDER  
HOLD  
REGISTER  
INPUT  
SIGNAL  
ZERO STUFF  
INTERPOLATION  
OUTPUT  
SIGNAL  
RESAMPLING  
DECIMATION  
AMP  
A
TIME  
B
C
D
E
Figure 1. Interpolation/Decimation Model—Time Domain View  
REV. A  
–7–  

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