Datasheet > AD1555_15

AD1555_15

更新时间： 2022-02-26 13:16:07

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
24页	435K
描述
24-Bit ADC with Low Noise PGA

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中文翻译

获取价格

数据手册

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AD1555_15 数据手册

AD1555/AD1556

Table VIII. Status Register Data Bits

Description

Bit

Number

Name

RESET State

DB23 (MSB)

DB22

DB21

DB20

DB19

DB18

DB17

DB16

DB15

DB14

DB13

DB12

DB11

DB10

DB9

ERROR

OVWR

MFLG

ACC

DRDY

FLSTL

DRNG

Detects One of the Following Errors

Read Sequence Overwrite Error

Modulator Flag Error

MFLG

Accumulator Error

Data Ready

Filter Settled

Output Data Not within AD1555 Range

PWRDN

CSEL

Power-Down Mode

Select TDATA Input

PWRDN

CSEL

DB8

DB7

DB6

DB5

BW2

BW1

BW0

Filter Bandwidth Selection

BW2

BW1

BW0

DB4

DB3

DB2

DB1

CB4

CB3

CB2

CB1

CB0

PGA Input Select

PGA Gain Select

PGA4

PGA3

PGA2

PGA1

PGA0

DB0 (LSB)

The AD1555 has three different ground pins: AGND1, AGND2,

and AGND3 plane, depending on the configuration. AGND1

should be a star point and be connected to the analog ground

point. AGND2 should be directly tied to AGND1. A low

impedance trace should connect in the following order: AGND3,

the low side of the reference decoupling capacitor on REFCAP1,

the ground of the reference voltage, and return to AGND1.

Evaluating the AD1555/AD1556 Performance

Performances of the AD1555/AD1556 can be evaluated with

the evaluation board EVAL-AD1555/AD1556EB. The evaluation

board package includes a fully assembled and tested evaluation

board, documentation, and software for controlling the board

from a PC via the PC printer port.

–22–

REV. B

1...19 20 212223 24

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