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ACT-F512K32N-060P7M PDF预览

ACT-F512K32N-060P7M

更新时间: 2024-11-01 22:56:27
品牌 Logo 应用领域
艾法斯 - AEROFLEX 闪存内存集成电路
页数 文件大小 规格书
20页 239K
描述
ACT-F512K32 High Speed 16 Megabit FLASH Multichip Module

ACT-F512K32N-060P7M 数据手册

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ACT–F512K32 High Speed  
16 Megabit FLASH Multichip Module  
CIRCUIT TECHNOLOGY  
www.aeroflex.com  
Features  
4 Low Power 512K x 8 FLASH Die in One MCM  
Package  
Industry Standard Pinouts  
Packaging – Hermetic Ceramic  
TTL Compatible Inputs and CMOS Outputs  
Access Times of 60, 70, 90, 120 and 150ns  
+5V Programing, 5V 10ꢀ Supply  
100,000 Erase/Program Cycles  
Low Standby Current  
Page Program Operation and Internal Program  
Control Time  
Sector Architecture (Each Die)  
68 Lead, .88" x .88" x .160" Single-Cavity Small  
Outline gull wing, Aeroflex code# "F5" (Drops into  
the 68 Lead JEDEC .99"SQ CQFJ footprint)  
66 Pin, 1.08" x 1.08" x .160" PGA Type, No  
Shoulder, Aeroflex code# "P3"  
66 Pin, 1.08" x 1.08" x .185" PGA Type, With  
Shoulder, Aeroflex code# "P7"  
Internal Decoupling Capacitors for Low Noise  
Operation  
8 Equal size sectors of 64K bytes each  
Any Combination of Sectors can be erased with  
one command sequence  
Commercial, Industrial and Military Temperature  
Ranges  
DESC SMD# 5962–94612  
Released (P3,P7,F5)  
Supports full chip erase  
Embedded Erase and Program Algorithms  
MIL-PRF-38534 Compliant MCMs Available  
Block Diagram – PGA Type Package(P3,P7) & CQFP(F5)  
General Description  
The ACT–F512K32 is a high  
speed, 16 megabit CMOS flash  
WE1 CE1 WE2 CE2 WE3 CE3 WE4 CE4  
multichip  
module  
(MCM)  
designed for full temperature  
range military, space, or high  
reliability applications.  
OE  
A0 A18  
512Kx8  
512Kx8  
512Kx8  
512Kx8  
The MCM can be organized  
as a 512K x 32bits, 1M x 16bits  
or 2M x 8bits device and is input  
8
8
8
8
TTL  
and  
output  
The  
CMOS  
compatible.  
command  
I/O0-7  
I/O8-15  
I/O16-23  
I/O24-31  
register is written by bringing  
WE to a logic low level (VIL),  
while CE is low and OE is at  
logic high level (VIH). Reading is  
accomplished by chip Enable  
(CE) and Output Enable (OE)  
being logically active, see  
Figure 9. Access time grades of  
60ns, 70ns, 90ns, 120ns and  
150ns maximum are standard.  
Pin Description  
I/O0-31 Data I/O  
A0–18 Address Inputs  
WE1-4 Write Enables  
CE1-4 Chip Enables  
OE  
VCC  
GND  
Output Enable  
Power Supply  
Ground  
The  
ACT–F512K32  
is  
packaged in a hermetically  
NC Not Connected  
eroflex Circuit Technology - Advanced Multichip Modules © SCD1665 REV B 6/29/01  

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