ACS422x68
LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC
Table 59. Power Management 1 Register - Mic Bias Enable .........................................................................51
Table 60. INVOL L&R Registers ....................................................................................................................52
Table 61. CNVRTR0 Register ........................................................................................................................54
Table 62. ADC HPF Enable ...........................................................................................................................54
Table 63. L/R ADC Digital Volume Registers .................................................................................................55
Table 64. ALC Control Registers ...................................................................................................................57
Table 65. NGATE Register ............................................................................................................................58
Table 66. DMIC Clock ....................................................................................................................................59
Table 67. Valid Digital Mic Configurations .....................................................................................................60
Table 68. DMICCTL Register .........................................................................................................................61
Table 69. AIC1 Register .................................................................................................................................64
Table 70. AIC2 Register .................................................................................................................................65
Table 71. Bit Clock and LR Clock Mode Selection .........................................................................................66
Table 72. ADC Data Output pin state ............................................................................................................67
Table 73. AIC3 Register .................................................................................................................................67
Table 74. Master Mode BCLK Frequency Control Register ...........................................................................68
Table 75. DEVADRl Register .........................................................................................................................70
Table 76. DEVID H&L Registers ....................................................................................................................71
Table 77. REVID Register ..............................................................................................................................71
Table 78. RESET Register .............................................................................................................................71
Table 79. ADCSR Register ............................................................................................................................72
Table 80. DACSR Register ............................................................................................................................73
Table 81. ACLK and Sample Rates ...............................................................................................................73
Table 82. CONFIG0 Register .........................................................................................................................74
Table 83. SDM Rates .....................................................................................................................................74
Table 84. Electrical Specification: Maximum Ratings ....................................................................................75
Table 85. Recommended Operating Conditions ............................................................................................75
Table 86. Device Characteristics ...................................................................................................................76
Table 87. PLL Section DC Characteristics .....................................................................................................78
Table 88. Register Map ..................................................................................................................................79
Table 89. ACS422x68TAG Power Pins .........................................................................................................85
Table 90. ACS422x68TAG Reference Pins ...................................................................................................85
Table 91. ACS422x68TAG Analog Input Pins ...............................................................................................86
Table 92. ACS422x68TAG Analog Output Pins .............................................................................................86
Table 93. ACS422x68TAG Data and Control Pins ........................................................................................86
Table 94. ACS422x68TAG Clock Pins ...........................................................................................................87
Table 95. ACS422x68NAG Power Pins .........................................................................................................87
Table 96. ACS422x68NAG Reference Pins ...................................................................................................88
Table 97. ACS422x68NAG Analog Input Pins ...............................................................................................88
Table 98. ACS422x68NAG Analog Output Pins ............................................................................................88
Table 99. ACS422x68NAG Data and Control Pins ........................................................................................89
Table 100. ACS422x68NAG Clock Pins ........................................................................................................89
Table 101. Reflow Temperatures ...................................................................................................................90
Table 102. Reflow Temperatures ...................................................................................................................91
7
V1.7 07/13
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
ACS422X68
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