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AB28F200BR-T80

更新时间： 2024-01-31 03:16:30
品牌 Logo 应用领域
英特尔 - INTEL 闪存存储内存集成电路光电二极管
页数 文件大小 规格书
36页 438K
描述
2-MBIT (128K X 16, 256K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY

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中文翻译

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AB28F200BR-T80 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：SOIC包装说明：0.525 X 1.110 INCH, PLASTIC, SOP-44
针数：44Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.69Is Samacsys：N
最长访问时间：80 ns其他特性：USER CONFIGURABLE 5V OR 12V VPP; DEEP POWER DOWN; TOP BOOT BLOCK; HARDWARE WRITE PROTECT
备用内存宽度：8启动块：TOP
命令用户界面：YES数据轮询：NO
JESD-30 代码：R-PDSO-G44JESD-609代码：e0
长度：28.2 mm内存密度：2097152 bit
内存集成电路类型：FLASH内存宽度：8
功能数量：1部门数/规模：1,2,1,1
端子数量：44字数：262144 words
字数代码：256000工作模式：ASYNCHRONOUS
最高工作温度：125 °C最低工作温度：-40 °C
组织：256KX8输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP44,.63封装形状：RECTANGULAR
封装形式：SMALL OUTLINE并行/串行：PARALLEL
电源：5 V编程电压：5 V
认证状态：Not Qualified座面最大高度：2.95 mm
部门规模：16K,8K,96K,128K最大待机电流：0.00001 A
子类别：Flash Memories最大压摆率：0.07 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：MOS温度等级：AUTOMOTIVE
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
切换位：NO类型：NOR TYPE
宽度：13.3 mmBase Number Matches：1

AB28F200BR-T80 数据手册

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E
A28F200BR  
operations, 5V VPP operation eliminates the need  
for in system voltage converters, while 12V VPP  
operation provides faster program and erase for  
situations where 12V is available, such as  
manufacturing or designs where 12V is already  
available.  
1.0 PRODUCT FAMILY OVERVIEW  
This datasheet contains the specifications for the  
automotive version of the 28F200BR family of boot  
block flash memory devices.  
This device continues to offer the same  
functionality as earlier “BX” devices but adds the  
capability of performing program and erase  
operations with a 5V or 12V VPP. The A28F200BR  
automatically senses which voltage is applied to  
the VPP pin and adjusts its operation accordingly.  
The 28F200 boot block flash memory family is a  
very high-performance, 2-Mbit (2,097,152 bit) flash  
memory family organized as either 256 Kwords  
(131,072 words) of 16 bits each or 512 Kbytes  
(262,144 bytes) of 8 bits each.  
Separately erasable blocks, including a hardware-  
lockable boot block (16,384 bytes), two parameter  
blocks (8,192 Bytes each) and main blocks (one  
block of 98,304 bytes and one block of 131,072  
bytes) define the boot block flash family  
architecture. See Figure 3 for memory maps. Each  
parameter block can be independently erased and  
programmed 10,000 times. Each main block can  
be erased 1,000 times.  
1.1  
New Features in the  
SmartVoltage Products  
The new SmartVoltage boot block flash memory  
family offers identical operation as the current  
BX/BL 12V program products, except for the  
differences listed below. All other functions are  
equivalent to current products, including  
signatures, write commands, and pinouts.  
The boot block is located at either the top  
(denoted by -T suffix) or the bottom (-B suffix) of  
the address map in order to accommodate  
different microprocessor protocols for boot code  
location. The hardware-lockable boot block  
provides complete code security for the kernel  
code required for system initialization. Locking and  
unlocking of the boot block is controlled by WP#  
and/or RP# (see Section 3.4 for details).  
•
•
WP# pin has replaced a DU pin. See Table 1  
for details.  
5V program/erase operation has been added  
that uses proven program and erase  
techniques with 5V ± 10% applied to VPP  
.
If you are designing with existing BX 12V VPP boot  
block products today, you should provide the  
capability in your board design to upgrade to these  
new SmartVoltage products.  
The Command User Interface (CUI) serves as the  
interface between the microprocessor or  
microcontroller and the internal operation of the  
boot block flash memory products. The internal  
Write State Machine (WSM) automatically  
executes the algorithms and timings necessary for  
program and erase operations, including  
Follow these guidelines to ensure compatibilty:  
1. Connect WP# (DU on existing products) to a  
control signal, VCC or GND.  
verifications,  
thereby  
unburdening  
the  
microprocessor or microcontroller of these tasks.  
The Status Register (SR) indicates the status of  
the WSM and whether it successfully completed  
the desired program or erase operation.  
2. If adding a switch on VPP for write protection,  
switch to GND for complete write protection.  
3. Allow for connecting 5V to VPP instead of 12V,  
if desired.  
Program and erase automation allows program  
and erase operations to be executed using an  
industry-standard two-write command sequence to  
the CUI. Data writes are performed in word or byte  
increments. Each byte or word in the flash  
memory can be programmed independently of  
other memory locations, unlike erases, which  
erase all locations within a block simultaneously.  
1.2  
Main Features  
Intel’s SmartVoltage technology provides the most  
flexible voltage solution in the industry.  
SmartVoltage provides two discrete voltage supply  
pins, VCC for read operation, and VPP for program  
and erase operation. Discrete supply pins allow  
system designers to use the optimal voltage levels  
for their design. For program and erase  
The 4-Mbit SmartVoltage boot block flash memory  
family is also designed with an Automatic Power  
5
ADVANCE INFORMATION  
12345678...36

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