Datasheet > 存储 > SRAM> A63L7336E-4.2F

A63L7336E-4.2F

更新时间： 2024-02-26 16:12:00

品牌	Logo	应用领域
联笙电子 - AMICC		计数器存储静态存储器
页数	文件大小	规格书
17页	257K
描述
128K X 36 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output

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技术参数
数据手册

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A63L7336E-4.2F 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.8
Base Number Matches：	1

A63L7336E-4.2F 数据手册

A63L7336

Timing Waveforms (continued)

tKC

CLK

ADSP

tKL

tADSS

tADSH

ADSC

ADDRESS

tWS

tWH

GW,BWE,

BW1-BW4

(NOTE *3)

tCES

tCEH

(NOTE *2)

ADV

tDH

tOELZ

tKQ

High-Z

D(A3)

D(A6)

DIN

D(A5)

KQLZ

OEHZ

(NOTE *1)

Q(A4)

DOUT

Q(A4+3)

Q(A1)

Back-to-Back READs

Q(A2)

Q(A3)

Q(A4+1)

Q(A4+2)

Back-to-Back

WRITEs

Pass-through

READ

Single WRITE

BURST READ

(NOTE *4)

Read/Write Timing

Notes:

*1. Q(A4) refers to output from address A4. Q(A4+1) refers to output from the internal burst address immediately

following A4.

*2. Timing for CE2 and CE2 is identical to that for CE . As shown in this diagram, when CE is LOW, CE2 is

LOW and CE2 is HIGH. When CE is HIGH, CE2 is HIGH and CE2 is LOW.

*3. Byte Write enables are decided by means of a Write truth table.

*4. Pass-through occurs when data is first written, then Read in sequence.

PRELIMINARY (July, 2005, Version 0.0)

AMIC Technology, Corp.

1...11 12 131415 16 17

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