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A54SX72A-FGG208A PDF预览

A54SX72A-FGG208A

更新时间: 2024-10-28 06:35:23
品牌 Logo 应用领域
ACTEL /
页数 文件大小 规格书
68页 498K
描述
SX-A Automotive Family FPGAs

A54SX72A-FGG208A 数据手册

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v2.2  
SX-A Automotive Family FPGAs  
u
e
Nonvolatile  
Specifications  
Configurable I/O Support for 3.3V PCI, 3.3V LVTTL,  
2.5V LVCMOS2  
12,000 to 108,000 Available System Gates  
Up to 360 User-Programmable I/O Pins  
Up to 2,012 Dedicated Flip-Flops  
Configurable Weak-Resistor Pull-up or Pull-down for  
Outputs at Power-up  
0.22µ CMOS Process Technology  
Individual Output Slew Rate Control  
Up to 100% Resource Utilization and 100% Pin  
Locking  
Features  
Deterministic, User-Controllable Timing  
250 MHz Internal Performance  
Unique In-System Diagnostic and Verification  
Capability with Silicon Explorer II  
Hot-Swap Compliant I/Os  
Power-up/down Friendly (No Sequencing Required  
for Supply Voltages)  
Boundary Scan Testing in Compliance with IEEE  
Standard 1149.1 (JTAG)  
66 MHz PCI Compliant  
Single-Chip Solution  
Actel’s Secure Programming Technology with  
FuseLock™ Prevents Reverse Engineering and Design  
Theft  
SX-A Automotive-Grade Product Profile  
Device  
A54SX08A  
A54SX16A  
A54SX32A  
A54SX72A  
Capacity  
Typical Gates  
System Gates  
8,000  
12,000  
16,000  
24,000  
32,000  
48,000  
72,000  
108,000  
Logic Modules  
Combinatorial Cells  
768  
512  
1,452  
924  
2,880  
1,800  
6,036  
4,024  
Register Cells  
Dedicated Flip-Flops  
Maximum Flip-Flops  
256  
512  
528  
990  
1,080  
1,980  
2,012  
4,024  
Maximum User I/Os  
Global Clocks  
130  
3
180  
3
249  
3
360  
3
Quadrant Clocks  
Boundary Scan Testing  
3.3V PCI  
0
0
0
4
Yes  
Yes  
Std  
A
Yes  
Yes  
Std  
A
Yes  
Yes  
Std  
A
Yes  
Yes  
Std  
A
Speed Grades  
Temperature Grades*  
Package (by pin count)  
PQFP  
TQFP  
FBGA  
208  
100, 144  
144  
208  
100, 144  
144, 256  
208  
100, 144  
144, 256  
208  
256, 484  
Note: *The SX-A family is also offered in commercial, industrial and military temperature grades with -F, -1, -2 and -3 speed grades, in  
addition to the Std speed grade. Refer to the SX-A Family FPGAs datasheet and HiRel SX-A Family FPGAs datasheet for more  
details.  
June 2006  
i
© 2006 Actel Corporation  

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