Datasheet > A43L0632G-75I

A43L0632G-75I

更新时间： 2022-04-25 03:52:36

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
42页	502K
描述
1M X 16 Bit X 4 Banks Synchronous DRAM

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

A43L0632G-75I 数据手册

A43L2616B

Function Truth Table (Table 1, Continued)

Current

CS RAS

Address

Action

Note

CAS

State

NOP(Continue Burst to End→Precharge)

ILLEGAL

Write with

Auto

CA,A10/AP ILLEGAL

Precharge

RA, PA

ILLEGAL

NOP→Idle after tRP

ILLEGAL

Precharge

CA,A10/AP ILLEGAL

ILLEGAL

A10/PA

NOP→Idle after tRP

ILLEGAL

NOP→Row Active after tRCD

ILLEGAL

Row

Activating

CA,A10/AP ILLEGAL

ILLEGAL

A10/PA

ILLEGAL

NOP→Idle after tRC

ILLEGAL

Refreshing

ILLEGAL

NOP→Idle after 2 clocks

Mode

Accessing

NOP→Idle after 2 clocks

ILLEGAL

Abbreviations

RA = Row Address

NOP = No Operation Command

BA = Bank Address

CA = Column Address

AP = Auto Precharge

PA = Precharge All

Note: 1. All entries assume that CKE was active (High) during the preceding clock cycle and the current clock cycle.

2. Illegal to bank in specified state : Function may be legal in the bank indicated by BA, depending on the state of that

bank.

3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.

4. NOP to bank precharging or in idle state. May precharge bank indicated by BA (and PA).

5. Illegal if any banks is not idle.

(December, 2009, Version 1.3)

AMIC Technology, Corp.

1...35 36 373839 40 41 42

下载PDF

与A43L0632G-75I相关器件

型号	品牌	描述	获取价格	数据表
A43L0632G-7F	AMICC	512K X 32 Bit X 2 Banks Synchronous DRAM	获取价格
A43L0632G-7UF	AMICC	512K X 32 Bit X 2 Banks Synchronous DRAM	获取价格
A43L0632G-95I	AMICC	1M X 16 Bit X 4 Banks Synchronous DRAM	获取价格
A43L0632V-75I	AMICC	1M X 16 Bit X 4 Banks Synchronous DRAM	获取价格
A43L0632V-95I	AMICC	1M X 16 Bit X 4 Banks Synchronous DRAM	获取价格
A43L1616	AMICC	1M X 16 Bit X 2 Banks Synchronous DRAM	获取价格