Datasheet > A43E1632G-75I

A43E1632G-75I

更新时间： 2024-10-28 12:35:47

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
42页	502K
描述
1M X 16 Bit X 4 Banks Synchronous DRAM

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数据手册

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A43E1632G-75I 数据手册

A43L2616B

Function Truth Table for CKE (Table 2)

Current

State

CKE CKE

RAS

Address

Action

Note

CAS

n-1

INVALID

Exit Self Refresh→ABI after tRC

ILLEGAL

Self

Refresh

ILLEGAL

NOP(Maintain Self Refresh)

INVALID

Exit Power Down→ABI

ILLEGAL

Both

Bank

Precharge

Power

ILLEGAL

Down

ILLEGAL

NOP(Maintain Power Down Mode)

Refer to Table 1

Enter Power Down

ILLEGAL

All

Banks

Idle

ILLEGAL

Enter Self Refresh

ILLEGAL

NOP

Refer to Operations in Table 1

Begin Clock Suspend next cycle

Exit Clock Suspend next cycle

Maintain clock Suspend

Any State

Other than

Listed

Above

Abbreviations : ABI = All Banks Idle

Note: 6. After CKE’s low to high transition to exit self refresh mode. And a time of t^RC(min) has to be elapse after CKE’s low

to high transition to issue a new command.

7. CKE low to high transition is asynchronous as if restarts internal clock.

A minimum setup time “tSS + one clock” must be satisfied before any command other than exit.

8. Power-down and self refresh can be entered only from the all banks idle state.

9. Must be a legal command.

(December, 2009, Version 1.3)

AMIC Technology, Corp.

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