Datasheet > A40MX02-TQ208A

A40MX02-TQ208A

更新时间： 2024-11-09 06:34:55

品牌	Logo	应用领域
ACTEL		/
页数	文件大小	规格书
78页	537K
描述
40MX and 42MX Automotive FPGA Families

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数据手册

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A40MX02-TQ208A 数据手册

v3.1

40MX and 42MX Automotive FPGA Families

Features

High Capacity

Ease of Integration

•

Single-Chip ASIC Alternative for Automotive

Applications

•

Up to 100% Resource Utilization and 100% Pin

Locking

•

3,000 to 54,000 System Gates

Up to 2.5 kbits Configurable Dual-Port SRAM

Fast Wide-Decode Circuitry

•

Deterministic, User-Controllable Timing

Unique In-System Diagnostic and Verification

Capability with Silicon Explorer II

Low Power Consumption

IEEE Standard 1149.1 (JTAG) Boundary Scan Testing

Up to 202 User-Programmable I/O Pins

•

Product Profile

Device

A40MX02

A40MX04

A42MX09

A42MX16

A42MX24

A42MX36

Capacity

System Gates

SRAM Bits

3,000

–

6,000

–

14,000

–

24,000

–

36,000

–

54,000

2,560

Logic Modules

Sequential

Combinatorial

Decode

–

295

–

547

–

348

336

–

624

608

–

954

912

1,230

1,184

SRAM Modules

(64x4 or 32x8)

–

348

516

–

624

928

–

954

1,410

1,230

1,822

Dedicated Flip-Flops

Maximum Flip-Flops

Clocks

147

273

Maximum User I/Os

Boundary Scan Test (BST)

–

104

–

140

–

176

Yes

202

Yes

Packages (by pin count)

PLCC

PQFP

VQFP

TQFP

100

–

100

–

100, 160

100

–

160, 208

–

208

100

176

208, 240

–

176

Note: While the automotive-grade MX devices are offered in standard speed grade only, the MX family is also offered in commercial,

industrial and military temperature grades with -F, Std, -1, -2 and -3 speed grades. Refer to the 40MX and 42MX Family FPGAs

datasheet for more details.

May 2006

See the Actel website (www.actel.com) for the latest version of this datasheet.

12 3 4 5 6 7...78

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