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A40MX02-3PL208I PDF预览

A40MX02-3PL208I

更新时间： 2024-11-09 12:41:23
品牌 Logo 应用领域
美高森美 - MICROSEMI /
页数 文件大小 规格书
142页 7439K
描述
40MX and 42MX FPGA Families

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中文翻译

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A40MX02-3PL208I 数据手册

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Revision 11  
40MX and 42MX FPGA Families  
HiRel Features  
Features  
High Capacity  
•
Commercial, Industrial, Automotive, and Military  
Temperature Plastic Packages  
•
•
•
•
•
Single-Chip ASIC Alternative  
•
Commercial, Military Temperature, and MIL-STD-883  
Ceramic Packages  
3,000 to 54,000 System Gates  
Up to 2.5 kbits Configurable Dual-Port SRAM  
Fast Wide-Decode Circuitry  
•
•
QML Certification  
Ceramic Devices Available to DSCC SMD  
Up to 202 User-Programmable I/O Pins  
Ease of Integration  
•
Mixed-Voltage Operation (5.0V or 3.3V for core and  
I/Os), with PCI-Compliant I/Os  
High Performance  
•
•
•
•
•
5.6 ns Clock-to-Out  
•
•
•
Up to 100% Resource Utilization and 100% Pin Locking  
Deterministic, User-Controllable Timing  
250 MHz Performance  
5 ns Dual-Port SRAM Access  
100 MHz FIFOs  
Unique In-System Diagnostic and Verification Capability  
with Silicon Explorer II  
7.5 ns 35-Bit Address Decode  
•
•
Low Power Consumption  
IEEE Standard 1149.1 (JTAG) Boundary Scan Testing  
Product Profile  
Device  
A40MX02  
A40MX04  
A42MX09  
A42MX16  
A42MX24  
A42MX36  
Capacity  
System Gates  
SRAM Bits  
3,000  
–
6,000  
–
14,000  
–
24,000  
–
36,000  
–
54,000  
2,560  
Logic Modules  
Sequential  
Combinatorial  
Decode  
–
295  
–
–
547  
–
348  
336  
–
624  
608  
–
954  
912  
24  
1,230  
1,184  
24  
Clock-to-Out  
9.5 ns  
9.5 ns  
5.6 ns  
6.1 ns  
6.1 ns  
6.3 ns  
SRAM Modules  
(64x4 or 32x8)  
–
–
–
–
–
348  
516  
2
–
624  
928  
2
–
954  
1,410  
2
10  
1,230  
1,822  
6
Dedicated Flip-Flops  
Maximum Flip-Flops  
Clocks  
147  
1
273  
1
User I/O (maximum)  
PCI  
57  
–
69  
–
104  
–
140  
–
176  
Yes  
Yes  
202  
Yes  
Yes  
Boundary Scan Test (BST)  
–
–
–
–
Packages (by pin count)  
PLCC  
PQFP  
VQFP  
TQFP  
CQFP  
PBGA  
44, 68  
44, 68, 84  
84  
100, 160  
100  
176  
–
84  
84  
160, 208  
–
208, 240  
–
100  
80  
–
–
–
100  
80  
–
–
–
100, 160, 208  
100  
176  
–
–
176  
–
–
208, 256  
272  
–
–
–
May 2012  
i
© 2012 Microsemi Corporation  
1234567...142

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与A40MX02-3PL208I相关器件

型号 品牌 获取价格 描述 数据表
A40MX02-3PL208M MICROSEMI

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 		40MX and 42MX FPGA Families
A40MX02-3PL44 MICROSEMI

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 		Field Programmable Gate Array, 295 CLBs, 3000 Gates, 109MHz, 295-Cell, CMOS, PQCC44, PLAST
A40MX02-3PL44B MICROSEMI

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 		Field Programmable Gate Array, 295 CLBs, 2000 Gates, 108.54MHz, CMOS, PQCC44
A40MX02-3PL44C MICROSEMI

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 		FPGA
A40MX02-3PL44I MICROSEMI

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 		Field Programmable Gate Array, 295 CLBs, 3000 Gates, 109MHz, 295-Cell, CMOS, PQCC44, PLAST
A40MX02-3PL44IX79 MICROSEMI

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 		Field Programmable Gate Array, 295 CLBs, 3000 Gates, 109MHz, CMOS, PQCC44, PLASTIC, LCC-44
A40MX02-3PL44M ETC

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 		Field Programmable Gate Array (FPGA)
A40MX02-3PL44MX39 ACTEL

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 		Field Programmable Gate Array, 295-Cell, CMOS, PQCC44,
A40MX02-3PL44MX79 ACTEL

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 		Field Programmable Gate Array, 295 CLBs, 3000 Gates, CMOS, PQCC44, PLASTIC, LCC-44
A40MX02-3PL44X79 MICROSEMI

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 		Field Programmable Gate Array, 295 CLBs, 3000 Gates, 109MHz, CMOS, PQCC44, PLASTIC, LCC-44

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