P r e l i m i n a r y
3200DX Field Programmable Gate Arrays
– The System Logic Integrator™ Family
F e a t u r e s
G e n e r a l D e s c r i p t i o n
The 3200DX, the first device family in Actel’s Integrator™
Series, are the first FPGAs optimized for high-speed,
high-complexity system logic integration. Based on Actel’s
proprietary PLICE antifuse technology and state-of-the-art
0.6-micron double metal CMOS process, the 3200DX offers
a fine-grained, register-rich architecture with the industry’s
fastest embedded dual-port SRAM.
H ig h C a p a c it y
• Up to 40,000 logic gates
• Up to 4 Kbits dual-port SRAM
• Fast wide decode circuitry
• Up to 292 User-programmable I/O Pins
H ig h P e r fo r m a n c e
The 3200DX was designed to integrate high performance
system logic functions typically implemented in multiple
CPLDs, PALs, and FPGAs. The 3200DX is the first
programmable logic device to embed dual-port SRAM into
the programmable array. Offering 5 ns access time, the
3200DX provides the fastest embedded SRAM of any
programmable logic device on the market today. This
combination of fast, flexible SRAM blocks with a true
dual-port architecture, allows designers to implement
extremely fast SRAM functions such as FIFOs, LIFOs and
scratchpad memory. The large number of storage elements
can efficiently address applications requiring wide datapath
manipulation and transformation functions such as
telecommunications, networking, DSP and bus interfaces.
The control and decode functions typically implemented in
CPLDs can easily be integrated into the 3200DX by taking
advantage of the wide decode modules.
• 200 MHz datapath applications
• 5 ns Dual-Port SRAM
• 100 MHz FIFOs
• 7.5 ns 35-bit Address Decode
E a s e -o f-In t e g r a t io n
• JTAG 1149.1 Boundary Scan Testing
• Synthesis-friendly architecture supports ASIC design
methodologies
• 95–100% logic utilization using automatic Place and
Route Tools
• Deterministic, user-controllable timing via
DirectTime™ software tools
• Designer Series™ development tool support including
interfaces to popular design environments such as
Cadence, Escalade, Exemplar Logic, IST, Mentor
Graphics, Synopsys and Viewlogic
The 3200DX family is supported by Actel’s Designer Series
3.0 software which provides a seamless integration into any
ASIC design flow. The Designer Series development tools
offer automatic or fixed pin assignments, automatic
placement and routing (with optional manual placement),
• Pin compatible with 1200XL Family
P r o d u c t F a m i l y P r o f i l e
Device
A3265DX
A32100DX
A32140DX
A32200DX
A32300DX
A32400DX
Capacity
Logic Gates
Dual-Port SRAM Bits
6,500
N/A
10,000
2,048
14,000
N/A
20,000
2,560
30,000
3,072
40,000
4,096
Logic Modules
Sequential
Combinatorial
Decode
510
475
20
700
662
20
954
912
24
1,230
1,184
24
1,888
1,833
28
2,526
2,466
28
SRAM Modules (64x4 or 32x8)
N/A
2
8
6
N/A
2
10
6
12
6
16
6
Clocks
JTAG
No
126
Yes
156
Yes
176
Yes
206
Yes
254
Yes
292
User I/O
A u g u s t 1 9 9 5
1
© 1995 Actel Corporation