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A32100DX-1PGB

更新时间: 2024-10-28 06:34:43
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ACTEL /
页数 文件大小 规格书
84页 3116K
描述
Integrator Series FPGAs: 1200XL and 3200DX Families

A32100DX-1PGB 数据手册

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Integrator Series FPGAs: 1200XL and 3200DX Families  
Logic Modules  
either a D-type flip-flop or a transparent latch. To increase  
3200DX and 1200XL devices contain three types of logic  
modules: combinatorial (C-modules), sequential  
flexibility, the S-module register can be bypassed so that it  
implements purely combinatorial logic.  
(S-modules), and decode (D-modules). 1200XL devices  
contain only the C-module and S-module, while the 3200DX  
devices contain D-modules and dual-port SRAM modules in  
addition to the S-module and C-module.  
A0  
B0  
S0  
The C-module is shown in Figure 1 and implements the  
following function:  
D00  
Y=!S1*!S0*D00+!S1*S0*D01+S1*!S0*D10+S1*S0*D11  
D01  
Y
where:  
D10  
D11  
S0=A0*B0  
S1=A1+B1  
S1  
The S-module shown in Figure 2 is designed to implement  
high-speed sequential functions within a single logic  
module. The S-module implements the same combinatorial  
logic function as the C-module while adding a sequential  
element. The sequential element can be configured as  
A1  
B1  
Figure 1 C-Module Implementation  
D00  
D01  
D00  
D01  
OUT  
OUT  
Y
D
Q
Y
D
Q
D10  
D10  
S0  
D11  
S1  
D11  
S1  
S0  
GATE  
CLR  
Up to 7-Input Function Plus D-Type Flip-Flop with Clear  
Up to 7-Input Function Plus Latch  
D00  
D01  
D0  
Y
OUT  
OUT  
Y
D
Q
D10  
S0  
D1  
D11  
S1  
GATE  
S
CLR  
Up to 8-Input Function (Same as C-Module)  
Up to 4-Input Function Plus Latch with Clear  
Figure 2 S-Module Implementation  
6
Discontinued – v3.0  

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