A28F400BX-T/B
4-MBIT (256K x16, 512K x8) BOOT BLOCK FLASH
MEMORY FAMILY
Automotive
Y
Y
Y
x8/x16 Input/Output Architecture
Ð A28F400BX-T, A28F400BX-B
Ð For High Performance and High
Integration 16-bit and 32-bit CPUs
Very High-Performance Read
Ð 90 ns Maximum Access Time
Ð 45 ns Maximum Output Enable Time
Y
Y
Y
Low Power Consumption
Ð 25 mA Typical Active Read Current
Optimized High Density Blocked
Architecture
Ð One 16 KB Protected Boot Block
Ð Two 8 KB Parameter Blocks
Ð One 96 KB Main Block
Deep Power-Down/Reset Input
Ð Acts as Reset for Boot Operations
Automotive Temperature Operation
b
a
40 C to 125 C
Ð
§
§
Write Protection for Boot Block
Ð Three 128 KB Main Blocks
Ð Top or Bottom Boot Locations
Y
Y
Y
Y
Extended Cycling Capability
Ð 1,000 Block Erase Cycles
Hardware Data Protection Feature
Ð Erase/Write Lockout During Power
Transitions
Automated Word/Byte Write and Block
Erase
Ð Command User Interface
Ð Status Register
Ð Erase Suspend Capability
Y
Industry Standard Surface Mount
Packaging
Ð JEDEC ROM Compatible
44-Lead PSOP
Y
Y
SRAM-Compatible Write Interface
Automatic Power Savings Feature
Y
Y
12V Word/Byte Write and Block Erase
e
g
12V 5% Standard
Ð V
PP
Ð 1 mA Typical I
CC
Static Operation
Active Current in
ETOXTM III Flash Technology
Ð 5V Read
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changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
©
COPYRIGHT INTEL CORPORATION, 1995
November 1995
Order Number: 290501-003