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A1225XLV-PL84C PDF预览

A1225XLV-PL84C

更新时间: 2024-10-29 03:26:39
品牌 Logo 应用领域
美高森美 - MICROSEMI 时钟可编程逻辑
页数 文件大小 规格书
84页 4582K
描述
Field Programmable Gate Array, 115MHz, 451-Cell, CMOS, PQCC84,

A1225XLV-PL84C 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.92
最大时钟频率:115 MHzJESD-30 代码:S-PQCC-J84
输入次数:72逻辑单元数量:451
输出次数:72端子数量:84
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC84,1.2SQ封装形状:SQUARE
封装形式:CHIP CARRIER电源:3.3 V
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY认证状态:Not Qualified
子类别:Field Programmable Gate Arrays标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
Base Number Matches:1

A1225XLV-PL84C 数据手册

 浏览型号A1225XLV-PL84C的Datasheet PDF文件第2页浏览型号A1225XLV-PL84C的Datasheet PDF文件第3页浏览型号A1225XLV-PL84C的Datasheet PDF文件第4页浏览型号A1225XLV-PL84C的Datasheet PDF文件第6页浏览型号A1225XLV-PL84C的Datasheet PDF文件第7页浏览型号A1225XLV-PL84C的Datasheet PDF文件第8页 
Integrator Series FPGAs: 1200XL and 3200DX Families  
Development Tool Support  
18-channel logic analyzer. Silicon Explorer II allows  
designers to complete the design verification process at  
their desks and reduces verification time from several hours  
per cycle to only a few seconds.  
The devices are fully supported by Actel’s line of FPGA  
development tools, including the Actel DeskTOP series and  
Designer Advantage tools. The Actel DeskTOP series is an  
integrated design environment for PCs that includes design  
entry, simulation, synthesis, and place and route tools.  
Designer Advantage, Actel’s suite of FPGA development  
point tools for PCs and Workstations, includes the ACTgen  
Macro Builder, timing-driven place and route and analysis  
tools, and device programming software.  
Integrator Series Architectural  
Overview  
The 1200XL and 3200DX architecture is composed of  
fine-grained building blocks which produce fast, efficient  
logic designs. All devices within the Integrator Series are  
composed of logic modules, routing resources, clock  
networks, and I/O modules which are the building blocks to  
design fast logic designs. In addition, a subset of devices  
contain embedded dual-port SRAM and wide-decode  
modules. The dual-port SRAM modules are optimized for  
high-speed datapath functions such as FIFOs, LIFOs, and  
scratchpad memory. The “Integrator Series Product Profile  
Family” on page 1 lists the specific logic resources  
contained within each device.  
In addition, the devices contain ActionProbe circuitry that  
provides built-in access to every node in a design, enabling  
100 percent real-time observation and analysis of a device's  
internal logic nodes without design iteration. The probe  
circuitry is accessed by Silicon Explorer II, an easy-to-use  
integrated verification and logic analysis tool that can  
sample data at 100 MHz (asynchronous) or 66 MHz  
(synchronous). Silicon Explorer II attaches to a PC’s  
standard COM port, turning the PC into a fully functional  
Plastic Device Resources  
User I/Os  
PQFP 144-Pin PQFP 160-Pin PQFP 208-Pin  
PQFP  
RQFP  
Device  
A1225XL  
PLCC 84-Pin VQFP 100-Pin  
TQFP 176-Pin  
100-Pin  
240-Pin  
72  
72  
72  
72  
72  
72  
83  
83  
83  
83  
104  
103  
126  
140  
142  
150  
A1240XL  
A3265DX  
A1280XL  
125  
125  
125  
125  
140  
152  
176  
176*  
176  
A32100DX  
A32140DX  
A32200DX  
A32300DX  
202  
202  
Package Definitions (Consult your local Actel Sales Representative for product availability.)  
PLCC = Plastic Leaded Chip Carrier, PQFP = Plastic Quad Flat Pack, TQFP = Thin Quad Flat Pack, BGA = Ball Grid Array, VQFP = Very Thin Quad Flat  
Pack, RQFP = Plastic Power Quad Flat Pack  
* Also available in RQFP 208-pin.  
Hermetic Device Resources  
User I/Os  
CPGA  
176-Pin  
CQFP  
84-Pin  
CQFP  
172-Pin  
CQFP  
208-Pin  
CQFP  
256-Pin  
Device  
A1280XL  
140  
60  
140  
A32100DX  
A32140DX  
A32200DX  
A32300DX  
176  
202  
212  
176  
Package Definitions (Consult your local Actel Sales Representative for product availability.)  
CPGA = Ceramic Pin Grid Array, CQFP = Ceramic Quad Flat Pack  
Discontinued – v3.0  
5

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