Datasheet > 9ZXL0651E

9ZXL0651E

更新时间： 2023-12-20 18:44:10

品牌	Logo	应用领域
瑞萨 - RENESAS		PC
页数	文件大小	规格书
34页	1350K
描述
6-Output DB800ZL PCIe Zero-Delay/Fanout Clock Buffer

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数据手册

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9ZXL0651E 数据手册

9ZXL04x1E/9ZXL06x1E/9ZXL08x1E/9ZXL12x1E Datasheet

9ZXL08x1E Pin Assignment

Figure 3. Pin Assignments for 6 × 6 mm 48-VFQFPN Package – Top View

48 47 46 45 44 43 42 41 40 39 38 37

^CKPWRGD_PD# 1

36 DIF6#

35 DIF6

34 VDD

GNDR

VDDR

DIF_IN

33 DIF5#

32 DIF5

31 vOE5#

30 vOE4#

29 DIF4#

28 DIF4

27 VDD

9ZXL0831E

DIF_IN#

SMBDAT

SMBCLK

FBOUT_NC#

FBOUT_NC

9ZXL0851E

EPAD is pin 49

Connect to GND

VDD 10

vOE0# 11

NC 12

26 DIF3#

25 DIF3

13 14 15 16 17 18 19 20 21 22 23 24

6 × 6mm, 48-VFQFPN, 0.4mm pad pitch

Pins with ^ prefix have internal 120kOhm pull-up

Pins with v prefix have internal 120kOhm pull-down

December 19, 2022

1 2 3 456 7 8...34

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