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9ZXL0632E

更新时间： 2023-12-20 18:45:16
品牌 Logo 应用领域
瑞萨 - RENESAS PC
页数 文件大小 规格书
34页 1241K
描述
6-Output DB800ZL PCIe Zero-Delay/Fanout Clock Buffer with SMBus Write Protection

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9ZXL0632E 数据手册

 浏览型号9ZXL0632E的Datasheet PDF文件第6页浏览型号9ZXL0632E的Datasheet PDF文件第7页浏览型号9ZXL0632E的Datasheet PDF文件第8页浏览型号9ZXL0632E的Datasheet PDF文件第10页浏览型号9ZXL0632E的Datasheet PDF文件第11页浏览型号9ZXL0632E的Datasheet PDF文件第12页 
9ZXL06x2E/9ZXL08xxE/9ZXL12x2E Datasheet  
Table 1. Pin Descriptions (Cont.)  
9ZXL12x2 9ZXL08x2 9ZXL0853 9ZXL06x2  
Name  
Type  
Description  
Pin No.  
Pin No.  
Pin No.  
Pin No.  
GND  
GND  
GND  
GND  
GNDA  
GND Ground pin.  
GND Ground pin.  
GND Ground pin.  
GND Ground pin.  
33  
41  
48  
58  
2
49  
49  
49  
-
49  
49  
49  
-
41  
-
-
-
GND Ground pin for the PLL core.  
49  
49  
41  
Analog ground pin for the differential input  
(receiver).  
GNDR  
NC  
GND  
7
2
49  
4
—
No connect.  
Input Clock pin of SMBUS circuitry.  
I/O Data pin of SMBUS circuitry.  
-
12,20,43,45 20,43,45  
30  
9
SMBCLK  
SMBDAT  
13  
12  
7
6
7
6
8
11,15,19,  
27,34,38,  
42  
12,16,20,  
21,25,29,  
31,35,39  
10,15,19,  
27,34,38,42  
VDD  
Power Power supply, nominally 3.3V.  
24  
VDD  
Power Power supply, nominally 3.3V.  
Power Power supply, nominally 3.3V.  
Power Power supply for PLL core.  
40  
57  
1
-
-
-
-
-
-
VDD  
VDDA  
VDDIO  
VDDIO  
VDDIO  
VDDIO  
44  
-
44  
-
40  
-
Power Power supply for differential outputs.  
Power Power supply for differential outputs.  
Power Power supply for differential outputs.  
Power Power supply for differential outputs.  
25  
32  
49  
56  
-
-
-
-
-
-
-
-
-
Power supply for differential input clock (receiver).  
Power This VDD should be treated as an analog power  
rail and filtered appropriately. Nominally 3.3V.  
VDDR  
8
3
11  
18  
-
2
12  
18  
-
5
13  
19  
-
Active low input for enabling output 0. This pin has  
an internal pull-down.  
vOE0#  
vOE1#  
vOE10#  
vOE11#  
vOE2#  
vOE3#  
Input  
Input  
Input  
Input  
Input  
Input  
19  
20  
61  
62  
28  
29  
1 = disable output, 0 = enable output.  
Active low input for enabling output 1. This pin has  
an internal pull-down.  
1 = disable output, 0 = enable output.  
Active low input for enabling output 10. This pin has  
an internal pull-down.  
1 = disable output, 0 = enable output.  
Active low input for enabling output 11. This pin has  
an internal pull-down.  
-
-
-
1 = disable output, 0 = enable output.  
Active low input for enabling output 2. This pin has  
an internal pull-down.  
23  
24  
23  
24  
22  
28  
1 = disable output, 0 = enable output.  
Active low input for enabling output 3. This pin has  
an internal pull-down.  
1 = disable output, 0 = enable output.  
R31DS0159EU0102 Rev.1.02  
Dec 22, 2022  
Page 9  
1...6789101112...34

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