Datasheet > 9ZXL0632E

9ZXL0632E

更新时间： 2023-12-20 18:45:16

品牌	Logo	应用领域
瑞萨 - RENESAS		PC
页数	文件大小	规格书
34页	1241K
描述
6-Output DB800ZL PCIe Zero-Delay/Fanout Clock Buffer with SMBus Write Protection

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9ZXL0632E 数据手册

9ZXL06x2E/9ZXL08xxE/9ZXL12x2E Datasheet

Table 1. Pin Descriptions (Cont.)

9ZXL12x2 9ZXL08x2 9ZXL0853 9ZXL06x2

Name

Type

Description

Pin No.

Tri-level input to select High BW, Bypass or Low

^HIBW_BYPM_LO Latched BW Mode. This pin has an internal pull-up resistor.

BW#

See <Hyperlink>PLL Operating Mode table for

details.

DIF_IN

DIF_IN#

DIF0

Input HCSL true input.

Input HCSL complementary input.

Output Differential true clock output.

DIF0#

DIF1

Output Differential complementary clock output.

Output Differential true clock output.

DIF1#

DIF10

DIF10#

DIF11

DIF11#

DIF2

Output Differential complementary clock output.

Output Differential true clock output.

Output Differential complementary clock output.

Output Differential true clock output.

Output Differential complementary clock output.

Output Differential true clock output.

DIF2#

DIF3

Output Differential complementary clock output.

Output Differential true clock output.

DIF3#

DIF4

Output Differential complementary clock output.

Output Differential true clock output.

DIF4#

DIF5

Output Differential complementary clock output.

Output Differential true clock output.

DIF5#

DIF6

Output Differential complementary clock output.

Output Differential true clock output.

DIF6#

DIF7

Output Differential complementary clock output.

Output Differential true clock output.

DIF7#

DIF8

Output Differential complementary clock output.

Output Differential true clock output.

DIF8#

DIF9

Output Differential complementary clock output.

Output Differential true clock output.

DIF9#

EPAD

Output Differential complementary clock output.

GND Connect EPAD to ground.

True half of differential feedback output. This pin

should NOT be connected to anything outside the

chip. It exists to provide delay path matching to get

FBOUT_NC

Output

0 propagation delay.

Complementary half of differential feedback output.

This pin should NOT be connected to anything

outside the chip. It exists to provide delay path

matching to get 0 propagation delay.

FBOUT_NC#

GND

Output

GND Ground pin.

R31DS0159EU0102 Rev.1.02

Dec 22, 2022

Page 8

1...5 6 789 10 11...34

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与9ZXL0632E相关器件

型号	品牌	获取价格	描述	数据表
9ZXL0632EKILF	IDT	获取价格	6-Output DB800ZL Derivat ive for PCIe Gen1â
9ZXL0632EKILFT	IDT	获取价格	6-Output DB800ZL Derivat ive for PCIe Gen1â
9ZXL0651	RENESAS	获取价格	6-Output Low-power Buffer for PCIe Gen1-2-3 and QPI with Zo=85 Ohms
9ZXL0651E	IDT	获取价格	6-Output DB800ZL Derivative for PCIe Gen1â4
9ZXL0651E	RENESAS	获取价格	6-Output DB800ZL PCIe Zero-Delay/Fanout Clock Buffer
9ZXL0651EKILF	IDT	获取价格	6-Output DB800ZL Derivative for PCIe Gen1â4
9ZXL0651EKILFT	IDT	获取价格	6-Output DB800ZL Derivative for PCIe Gen1â4
9ZXL0652E	IDT	获取价格	6-Output DB800ZL Derivat ive for PCIe Gen1â
9ZXL0652E	RENESAS	获取价格	6-Output DB800ZL PCIe Zero-Delay/Fanout Clock Buffer with SMBus Write Protection
9ZXL0652EKILF	IDT	获取价格	6-Output DB800ZL Derivat ive for PCIe Gen1â

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