Datasheet > 9DB206LLFT

9DB206LLFT

更新时间： 2024-01-21 15:03:55

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
13页	292K
描述
Clock Driver

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

9DB206LLFT 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.84	Base Number Matches：	1

9DB206LLFT 数据手册

ICS9DB206

Integrated

Circuit

Systems, Inc.

PCI EXPRESS

™

JITTER

ATTENUATOR

TABLE 1. PIN DESCRIPTIONS

Number

Name

PLL_BW

CLK

Type

Pullup

Description

Selects PLL Bandwidth input. LVCMOS/LVTTL interface levels.

Input

Pulldown Non-inverting differential clock input.

Pullup/

nCLK

FS0

Input

Inverting differential clock input. V_DD/2 default when left floating.

Pulldown

Pullup Frequency select pin. LVCMOS/LVTTL interface levels.

PCIEXT0,

PCIEXC0

5, 6

Output

Differential output pairs. HCSL interface levels.

7, 13, 16, 22

8, 21

V_DD

Power

Core supply pins.

GND

Power supply ground.

PCIEXT1,

PCIEXC1

PCIEXT2,

PCIEXC2

nOE0,

9, 10

11, 12

14, 15

17, 18

19, 20

Output

Input

Differential output pairs. HCSL interface levels.

Output enable. When HIGH, forces outputs to HiZ state.

Pulldown

nOE1

When LOW, enables outputs. LVCMOS/LVTTL interface levels.

PCIEXC3,

PCIEXT3

PCIEXC4,

PCIEXT4

PCIEXC5,

PCIEXT5

Output

Differential output pairs. HCSL interface levels.

23, 24

Output

Input

Differential output pairs. HCSL interface levels.

FS1

Pulldown Frequency select pin. LVCMOS/LVTTL interface levels.

A fixed precision resistor (475Ω) from this pin to ground provides a

reference current used for differential current-mode PCIEX clock outputs.

IREF

Input

GND

V_DDA

Power

Power supply ground.

Analog supply pin. Requires 24Ω series resistor.

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

TABLE 2. PIN CHARACTERISTICS

Symbol

C_IN

Parameter

Test Conditions

Minimum Typical

Maximum Units

Input Capacitance

Input Pullup Resistor

KΩ

R_PULLUP

R_PULLDOWNInput Pulldown Resistor

TABLE 3A. RATIO OF OUTPUT FREQUENCY TO

INPUT FREQUENCY FUNCTION TABLE, FS0

TABLE 3B. RATIO OF OUTPUT FREQUENCY TO

INPUT FREQUENCY FUNCTION TABLE, FS1

Inputs

Outputs

PCIEX1

5/4

Inputs

Outputs

PCIEX4

FS0

PCIEX0

PCIEX2

FS1

PCIEX3

PCIEX5

5/4

TABLE 3C. OUTPUT ENABLE

FUNCTION TABLE, nOE0

TABLE 3D. OUTPUT ENABLE

FUNCTION TABLE, nOE1

TABLE 3E. PLL BANDWIDTH TABLE

Inputs

Outputs

PCIEX0:2

Enabled

HiZ

Inputs

Outputs

PCIEX3:5

Enabled

HiZ

Bandwidth

PLL_BW

nOE0

nOE1

500kHz

1MHz

9DB206CL

www.icst.com/products/hiperclocks.html

REV. A NOVEMBER 29, 2004

123 4 5 6 7...13

下载PDF

与9DB206LLFT相关器件

型号	品牌	描述	获取价格	数据表
9DB233	IDT	Two Output Differential Buffer for PCIe Gen3	获取价格
9DB233	RENESAS	2-output 3.3 V PCIe Gen1-2-3 Zero Delay / Fanout Buffer	获取价格
9DB233AFILF	IDT	Two Output Differential Buffer for PCIe Gen3	获取价格
9DB233AFILFT	IDT	Two Output Differential Buffer for PCIe Gen3	获取价格
9DB233AFLF	IDT	Two Output Differential Buffer for PCIe Gen3	获取价格
9DB233AFLFT	IDT	Two Output Differential Buffer for PCIe Gen3	获取价格