是否无铅: | 含铅 | 是否Rohs认证: | 不符合 |
生命周期: | Obsolete | 零件包装代码: | CABGA |
包装说明: | VFBGA, | 针数: | 52 |
Reach Compliance Code: | not_compliant | ECCN代码: | EAR99 |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.5 |
系列: | 97ULP | 输入调节: | DIFFERENTIAL |
JESD-30 代码: | R-PBGA-B52 | JESD-609代码: | e0 |
长度: | 7 mm | 逻辑集成电路类型: | CLOCK DRIVER |
湿度敏感等级: | 3 | 功能数量: | 1 |
反相输出次数: | 端子数量: | 52 | |
实输出次数: | 10 | 最高工作温度: | 70 °C |
最低工作温度: | 输出特性: | 3-STATE | |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | VFBGA |
封装形状: | RECTANGULAR | 封装形式: | GRID ARRAY, VERY THIN PROFILE, FINE PITCH |
峰值回流温度(摄氏度): | 225 | 认证状态: | Not Qualified |
Same Edge Skew-Max(tskwd): | 0.04 ns | 座面最大高度: | 1 mm |
最大供电电压 (Vsup): | 1.9 V | 最小供电电压 (Vsup): | 1.7 V |
标称供电电压 (Vsup): | 1.8 V | 表面贴装: | YES |
温度等级: | COMMERCIAL | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | BALL | 端子节距: | 0.65 mm |
端子位置: | BOTTOM | 处于峰值回流温度下的最长时间: | 20 |
宽度: | 4.5 mm | 最小 fmax: | 350 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 描述 | 获取价格 | 数据表 |
97ULP877BHLF-T | IDT | PLL Based Clock Driver, 97ULP Series, 10 True Output(s), 0 Inverted Output(s), PBGA52, LEA |
获取价格 |
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97ULP877BH-T | IDT | PLL Based Clock Driver, 97ULP Series, 10 True Output(s), 0 Inverted Output(s), PBGA52, MO- |
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97ULP877BKLF-T | IDT | PLL Based Clock Driver, 97ULP Series, 10 True Output(s), 0 Inverted Output(s), PQCC40, LEA |
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97ULPA877AHLF | IDT | CABGA-52, Tray |
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97ULPA877AHLF-T | IDT | PLL Based Clock Driver, 97ULP Series, 10 True Output(s), 0 Inverted Output(s), PBGA52, ROH |
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97ULPA877AKLF | IDT | Clock Driver |
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