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94211AFLF PDF预览

94211AFLF

更新时间: 2024-11-21 08:55:51
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
18页 157K
描述
SSOP-48, Tube

94211AFLF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:0.300 INCH, GREEN, MO-118, SSOP-48针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
其他特性:ALSO REQUIRES 2.5V SUPPLYJESD-30 代码:R-PDSO-G48
JESD-609代码:e3长度:15.875 mm
湿度敏感等级:1端子数量:48
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:150 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
主时钟/晶体标称频率:14.318 MHz认证状态:Not Qualified
座面最大高度:2.8 mm最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

94211AFLF 数据手册

 浏览型号94211AFLF的Datasheet PDF文件第2页浏览型号94211AFLF的Datasheet PDF文件第3页浏览型号94211AFLF的Datasheet PDF文件第4页浏览型号94211AFLF的Datasheet PDF文件第5页浏览型号94211AFLF的Datasheet PDF文件第6页浏览型号94211AFLF的Datasheet PDF文件第7页 
ICS94211  
Integrated  
Circuit  
Systems, Inc.  
Programmable System Frequency Generator for PII/III™  
Recommended Application:  
Pin Configuration  
440BX/VIA Apollo Pro133/ ALI 1631 style chipset.  
Output Features:  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VDDREF  
*PCI_STOP/REF0  
GND  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
VDDLAPIC  
IOAPIC  
REF1/FS2*  
GND  
2 - CPUs @2.5V  
X1  
X2  
VDDPCI  
1 - IOAPIC @ 2.5V  
13 - SDRAM @ 3.3V  
6 - PCI @3.3V,  
1 - 48MHz, @3.3V  
1 - 24MHz @ 3.3V  
2 - REF @3.3V, 14.318MHz.  
CPUCLK0  
CPUCLK1  
VDDLCPU  
RESET#  
SDRAM0  
GND  
SDRAM1  
SDRAM2  
VDDSDR  
SDRAM3  
SDRAM4  
GND  
SDRAM5  
SDRAM6  
VDDSDR  
SDRAM7  
SDRAM8  
VDD48  
*MODE/PCICLK_F  
**FS3/PCICLK0  
GND  
PCICLK1  
PCICLK2  
PCICLK3  
PCICLK4  
VDDPCI  
Features:  
BUFFER_IN  
GND  
Programmable ouput frequency.  
Programmable ouput rise/fall time.  
Programmable PCICLK, PCICLK_F,  
SDRAM skew.  
SDRAM12_F  
SDRAM11  
VDDSDR  
SDRAM10  
SDRAM9  
GND  
Real time system reset output  
Spread spectrum for EMI control typically by 7dB to  
8dB,  
SDATA  
SCLK  
48MHz/FS0*  
24MHz/FS1*  
with programmable spread percentage.  
Watchdog timer technology to reset system  
if over-clocking causes malfunction.  
Uses external 14.318MHz crystal.  
FS pins for frequency select  
48-Pin 300mil SSOP  
*
Internal Pull-up Resistor of 120K to VDD  
** Internal Pull-down resistor of 120K to GND  
Key Specifications:  
Functionality  
CPU – CPU: <175ps  
SDRAM - SDRAM: <500ps  
PCI – PCI: <500ps  
CPU  
(MHz)  
80.00  
75.00  
83.31  
PCICLK  
(MHz)  
40.00  
37.50  
41.65  
33.41  
34.33  
37.34  
34.01  
33.41  
40.00  
38.33  
36.66  
35.00  
35.00  
37.50  
31.00  
33.25  
FS3  
FS2  
FS1  
FS0  
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CPU(early)-PCI: Min=1.0ns, Typ=2.0ns, Max=4.0ns  
Block Diagram  
66.82  
103.00  
112.01  
68.01  
PLL2  
48MHz  
24MHz  
/2  
X1  
X2  
XTAL  
OSC  
100.23  
120.00  
114.99  
109.99  
105.00  
140.00  
150.00  
124.00  
132.99  
IOAPIC  
BUFFER IN  
REF(1:0)  
2
13  
2
SDRAM (12:0)  
CPUCLK (1:0)  
PLL1  
Spread  
Spectrum  
PCI  
CLOCK  
DIVDER  
STOP  
PCICLK (4:0)  
PCICLK_F  
RESET#  
5
Control  
Logic  
4
FS(3:0)  
MODE  
PCI_STOP#  
SDATA  
Config.  
Reg.  
SCLK  
0441E—11/17/04  

94211AFLF 替代型号

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