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934058819115 PDF预览

934058819115

更新时间: 2024-11-25 21:13:23
品牌 Logo 应用领域
恩智浦 - NXP 开关脉冲晶体管
页数 文件大小 规格书
12页 91K
描述
934058819115

934058819115 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SMALL OUTLINE, R-PSSO-G4Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.84
其他特性:LOGIC LEVEL外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:30 V
最大漏极电流 (ID):38 A最大漏源导通电阻:16.9 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:MO-235
JESD-30 代码:R-PSSO-G4元件数量:1
端子数量:4工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE极性/信道类型:N-CHANNEL
最大脉冲漏极电流 (IDM):100 A表面贴装:YES
端子形式:GULL WING端子位置:SINGLE
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

934058819115 数据手册

 浏览型号934058819115的Datasheet PDF文件第2页浏览型号934058819115的Datasheet PDF文件第3页浏览型号934058819115的Datasheet PDF文件第4页浏览型号934058819115的Datasheet PDF文件第5页浏览型号934058819115的Datasheet PDF文件第6页浏览型号934058819115的Datasheet PDF文件第7页 
PH16030L  
N-channel TrenchMOS™ logic level FET  
Rev. 01 — 24 February 2005  
Product data sheet  
1. Product profile  
1.1 General description  
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic  
package using TrenchMOS™ technology.  
1.2 Features  
Logic level threshold  
SO8 equivalent area footprint  
Low thermal resistance  
Low gate charge.  
1.3 Applications  
DC-to-DC converters  
Portable appliances.  
1.4 Quick reference data  
VDS 30 V  
ID 38 A  
RDSon 16.9 mΩ  
Qgd = 2.9 nC (typ).  
2. Pinning information  
Table 1:  
Pin  
Pinning  
Description  
Simplified outline  
Symbol  
1, 2, 3 source  
D
S
mb  
4
gate  
mb  
mounting base; connected to drain  
G
mbb076  
1
2 3 4  
SOT669 (LFPAK)  

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