Datasheet > 9112AM-27

9112AM-27

更新时间： 2024-09-27 21:11:03

品牌	Logo	应用领域
艾迪悌 - IDT		/
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12页	163K
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9112AM-27 数据手册

ICS9112-27

Integrated

Circuit

Systems, Inc.

Low Skew PCI / PCI-X Buffer

General Description

The ICS9112-27 isahighperformance, lowskew, lowjitter

PCI / PCI-X clock driver. It is designed to distribute high

speed signals in PCI / PCI-X applications operating at

speeds from 0 to 140 MHz.

Features

•

Frequency range 0 - 140 MHz (3.3V)

Less than 200 ps Jitter between outputs

Skew controlled outputs < 100 ps

Distribute one clock input to one bank of four

outputs

•

3.3V 10ꢀ operation

Available in 8 pin TSSOP, and SOIC packages.

The ICS9112-27 ischaracterizedforoperationfrom-40°C

to 85°C for automotive and industrial applications.

Block Diagram

Pin Configuration

LOGIC

CONTROL

CLK_IN

CLK3

CLK2

VDD

CLK0

CLK1

CLK2

CLK3

CLK0

GND

CLK1

8 pin TSSOP & SOIC

Functionality Table

CLK_IN

INPUTS

OUTPUTS

CLK(3:0)

Tristate

CLK_IN

Tristate

Pin Descriptions

PIN NUMBER

PIN NAME

TYPE

DESCRIPTION

CLK_IN

Input reference frequency.

Output enable. When OE is low, it tristates the clock outputs

CLK0

GND

CLK1

VDD

OUT

PWR

OUT

PWR

OUT

Buffered clock output

Ground

Buffered clock output

Power supply for 3.3V

Buffered clock output

CLK2

CLK3

0055G—04/26/05

12 3 4 5 6 7...12

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