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88E3018 PDF预览

88E3018

更新时间: 2024-11-11 06:33:39
品牌 Logo 应用领域
迈威 - MARVELL 以太网
页数 文件大小 规格书
2页 135K
描述
Single-Port Fast Ethernet Transceivers

88E3018 数据手册

 浏览型号88E3018的Datasheet PDF文件第2页 
Marvell Alaska 88E3015/88E3016/88E3018  
Single-Port Fast Ethernet Transceivers  
PRODUCT OVERVIEW  
The Marvell® Alaska® 88E3015, 88E3016, and 88E3018 are Marvell’s fourth-generation DSP-based physical layer (PHY)  
transceivers for Fast Ethernet (FE) applications. The devices contain all the active circuitry required to convert data  
streams to and from a Media Access Controller (MAC) and to and from the physical media. The 88E3015, 88E3016, and  
88E3018 devices incorporate IEEE 802.3u auto-negotiation, supporting both 100BASE-TX and 10BASE-T networks over  
twisted-pair cable in full-duplex or half-duplex mode.  
The 88E3015, 88E3016, and 88E3018 all support the Reduced Gigabit Media Independent Interface (RGMII), with the 88E3015  
and 883018 also supporting the Media Independent Interface (MII). They all feature a mode of operation supporting IEEE-  
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to provide a mechanism for transferring information from the local station to the link partner that indicates that a remote  
fault has occurred in 100BASE-FX mode.  
The Alaska 88E3015, 88E3016, and 88E3018 feature the Marvell Virtual Cable Tester® (VCT™) technology, which enables  
IT managers and networking equipment manufacturers to remotely analyze the quality and characteristics of the attached  
cable plant. Additionally, the devices use advanced mixed-signal processing and power-management techniques for extremely  
low power dissipation and high port count system integration.  
The 88E3015, 88E3016, and 88E3018 devices can operate from a single 2.5v or 3.3v supply. They are offered in low-pin  
count QFN packages which reduce board space and are ideal for small form-factor applications. In addition, the 88E3016  
and 88E3018 are the only single-port FE PHYs available in the industry which are pin-upgradeable to Gigabit Ethernet.  
BLOCK DIAGRAM  
Fig 1. 88E3018 Functional Block Diagram  

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