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8743008DKILF PDF预览

8743008DKILF

更新时间： 2024-10-28 21:18:23
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
28页 1231K
描述
Low Skew Clock Driver, 8743008 Series, 8 True Output(s), 0 Inverted Output(s), 8 X 8 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJD-2, VFQFN-56

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8743008DKILF 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：VQCCN, LCC56,.31SQ,20针数：56
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.78
系列：8743008输入调节：DIFFERENTIAL MUX
JESD-30 代码：S-XQCC-N56JESD-609代码：e3
长度：8 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
湿度敏感等级：3功能数量：1
反相输出次数：端子数量：56
实输出次数：8最高工作温度：85 °C
最低工作温度：-40 °C输出特性：OPEN-EMITTER
封装主体材料：UNSPECIFIED封装代码：VQCCN
封装等效代码：LCC56,.31SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
座面最大高度：1 mm子类别：Clock Drivers
最大供电电压 (Vsup)：3.465 V最小供电电压 (Vsup)：3.135 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn) - annealed
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：8 mm最小 fmax：98 MHz
Base Number Matches：1

8743008DKILF 数据手册

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PRELIMINARY  
FEMTOCLOCKS™ LVDS/LVPECL ZERO DELAY BUFFER/  
CLOCK GENERATOR FOR PCI EXPRESS™ AND ETHERNET  
ICS8743008I  
General Description  
Features  
The ICS8743008I is Zero-Delay Buffer/Frequency  
• Eight differential output pairs with selectable pin type: LVDS or  
LVPECL. Each output pair is individually selectable for 100MHz  
or 125MHz (for PCIe and Ethernet applications).  
S
IC  
Multiplier with eight differential LVDS or LVPECL  
output pairs (pin selectable output type), and uses  
external feedback for “zero delay” clock  
HiPerClockS™  
• One differential clock input pair CLK/nCLK can accept the  
following differential input levels: LVPECL, LVDS, M-LVDS,  
LVHSTL, HCSL  
regeneration. In PCI Express and Ethernet  
applications, 100MHz and 125MHz are the most commonly used  
reference clock frequencies and each of the eight output pairs can  
be independently set for either 100MHz or 125MHz. With an  
output frequency range of 98MHz to 165MHz, the device is also  
suitable for use in a variety of other applications such as Fibre  
Channel (106.25MHz) and XAUI (156.25MHz). The M-LVDS  
Input/Output pair is useful in backplane applications when the  
reference clock can either be local (on the same board as the  
ICS8743008I) or remote via a backplane connector. In output  
mode, an input from a local reference clock applied to the  
CLK/nCLK input pins is translated to M-LVDS and driven out to the  
MLVDS/nMLVDS pins. In input mode, the internal M_LVDS driver  
is placed in Hi-Z state using the OE_MLVDS pin and  
• One M-LVDS I/O (MLVDS/nMLVDS)  
• Output frequency range: 98MHz - 165MHz  
• Input frequency range: 19.6MHz - 165MHz  
• VCO range: 490MHz - 660MHz  
• PCI Express (2.5 Gb/S) and Gen 2 (5 Gb/s) jitter compliant  
• External feedback for “zero delay” clock regeneration  
• RMS phase jitter @ 125MHz (1.875MHz – 20MHz):  
0.57ps (typical)  
• Full 3.3V supply mode  
• -40°C to 85°C ambient operating temperature  
• Available in lead-free (RoHS 6) packages  
MLVDS/nMLVDS pin then becomes an input (e.g. from a  
backplane).  
The ICS8743008I uses very low phase noise FemtoClock  
technology, thus making it ideal for such applications as PCI  
Express Generation 1 and 2 as well as for Gigabit Ethernet, Fibre  
Channel, and 10 Gigabit Ethernet. It is packaged in a 56-VFQFN  
package (8mm x 8mm).  
Pin Assignment  
56 55 54 53 52 51 50 49 48 47 46 45 44 43  
42  
41  
VDD  
1
VDDO  
Q2  
OE_MLVDS  
2
nQ2  
Q3  
3
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
MLVDS  
nMLVDS  
GND  
4
5
nQ3  
6
VDDO  
Q4  
PLL_SEL  
VDD  
7
nQ4  
nc  
8
9
Q5  
nQ5  
FBO_DIV  
MR  
10  
11  
12  
13  
14  
OE0  
FBOUT  
nFBOUT  
VDDO  
OE1  
OE2  
GND  
Q_TYPE  
15 16 17 18 19 20 21 22 23 24 25 26 27 28  
ICS8743008I  
56-Lead VFQFN  
8mm x 8mm x 0.925mm package body  
K Package  
Top View  
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.  
Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT™ / ICS™ LVDS/LVPECL ZERO DELAY BUFFER/CLOCK GENERATOR 1  
ICS8743008DKI REV. A AUGUST 25, 2008  
1234567...28

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